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MC9S08SH4MPJR 数据表(PDF) 39 Page - Freescale Semiconductor, Inc |
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MC9S08SH4MPJR 数据表(HTML) 39 Page - Freescale Semiconductor, Inc |
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39 / 341 page  Chapter 3 Modes of Operation MC9S08SH8 MCU Series Data Sheet, Rev. 3 Freescale Semiconductor 35 Table 3-2. Stop Mode Behavior Peripheral Mode Stop2 Stop3 CPU Off Standby RAM Standby Standby FLASH Off Standby Parallel Port Registers Off Standby ADC Off Optionally On1 1 Requires the asynchronous ADC clock and LVD to be enabled, else in standby. ACMP Off Optionally On2 2 Requires the LVD to be enabled when compare to internal bangap reference option is enabled. BDM Off3 3 If ENBDM is set when entering stop2, the MCU will actually enter stop3.. Optionally On ICS Off Optionally On4 4 IRCLKEN and IREFSTEN set in ICSC1, else in standby. IIC Off Standby LVD/LVW Off5 5 If LVDSE is set when entering stop2, the MCU will actually enter stop3.. Optionally On MTIM Off Standby RTC Optionally On Optionally On SCI Off Standby SPI Off Standby TPM Off Standby Voltage Regulator Standby Optionally On6 6 Voltage regulator will be on if BDM is enabled or if LVD is enabled when entering stop3. XOSC Off Optionally On7 7 ERCLKEN and EREFSTEN set in ICSC2, else in standby. For high frequency range (RANGE in ICSC2 set) requires the LVD to also be enabled in stop3. I/O Pins States Held States Held |
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