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MCP4341T503E/ST 数据表(PDF) 40 Page - Microchip Technology

部件名 MCP4341T503E/ST
功能描述  7/8-Bit Quad SPI Digital POT with Non-Volatile Memory
PDF  80 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

MCP4341T503E/ST 数据表(HTML) 40 Page - Microchip Technology

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MCP434X/436X
DS22233A-page 40
© 2009 Microchip Technology Inc.
5.2
Wiper
Each tap point (between the RS resistors) is a
connection point for an analog switch. The opposite
side of the analog switch is connected to a common
signal which is connected to the Terminal W (Wiper)
pin.
A value in the volatile wiper register selects which
analog switch to close, connecting the W terminal to
the selected node of the resistor ladder.
The wiper can connect directly to Terminal B or to
Terminal A. A zero scale connections, connects the
Terminal W (wiper) to Terminal B (wiper setting of
000h). A full scale connections, connects the Terminal
W (wiper) to Terminal A (wiper setting of 100h or 80h).
In these configurations the only resistance between the
Terminal W and the other Terminal (A or B) is that of the
analog switches.
A wiper setting value greater than full scale (wiper
setting of 100h for 8-bit device or 80h for 7-bit devices)
will also be a Full Scale setting (Terminal W (wiper)
connected to Terminal A). Table 5-1 illustrates the full
wiper setting map.
Equation 5-2
illustrates
the
calculation
used
to
determine the resistance between the wiper and
terminal B.
EQUATION 5-2:
RWB CALCULATION
TABLE 5-1:
VOLATILE WIPER VALUE VS.
WIPER POSITION MAP
5.3
WiperLock™ Technology
The MCP43XX device’s WiperLock technology allows
application-specific calibration settings to be secured in
the EEPROM without requiring the use of an additional
write-protect pin. There are four WiperLock Technology
configuration bits (WL0, WL1, WL2, and WL3). These
bits prevent the Non-Volatile and Volatile addresses
and bits for the specified resistor network from being
written.
The
WiperLock
technology
prevents
the
serial
commands from doing the following:
• Changing a volatile wiper value
• Writing to the specified non-volatile wiper memory
location
• Changing the related volatile TCON register bits
For either Resistor Network 0, Resistor Network 1,
Resistor Network 2, or Resistor Network 3 (Potx), the
WLx bit controls the following:
• Non-Volatile Wiper Register
• Volatile Wiper Register
• Volatile TCON register bits RxHW, RxA, RxW, and
RxB
High Voltage commands are required to enable and
disable WiperLock. Please refer to the Modify Write
Protect or WiperLock Technology (High Voltage)
command for operation.
5.3.1
POR/BOR OPERATION WHEN
WIPERLOCK TECHNOLOGY
ENABLED
The WiperLock Technology state is not affected by a
POR/BOR event. A POR/BOR event will load the
Volatile Wiper register value with the Non-Volatile
Wiper register value, refer to Section 4.1.
Wiper Setting
Properties
7-bit
8-bit
3FFh –
081h
3FFh –
101h
Reserved (Full Scale (W = A)),
Increment and Decrement
commands ignored
080h
100h
Full Scale (W = A),
Increment commands ignored
07Fh –
041h
0FFh –
081h
W = N
040h
080h
W = N (Mid Scale)
03Fh –
001h
07Fh –
001h
W = N
000h
000h
Zero Scale (W = B)
Decrement command ignored
R
WB
R
ABN
256
()
--------------R
W
+
=
N = 0 to 256 (decimal)
R
WB
R
ABN
128
()
--------------R
W
+
=
N = 0 to 128 (decimal)
8-bit Device
7-bit Device



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