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ADS8344EB 数据表(PDF) 2 Page - Texas Instruments |
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ADS8344EB 数据表(HTML) 2 Page - Texas Instruments |
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2 / 25 page ![]() ADS8344 2 SBAS139E MINIMUM RELATIVE MAXIMUM SPECIFIED PACKAGE ACCURACY GAIN ERROR TEMPERATURE PACKAGE DRAWING ORDERING TRANSPORT PRODUCT (LSB) (%) RANGE DESIGNATOR PACKAGE-LEAD NUMBER NUMBER MEDIA, QUANTITY ADS8344E 8 ±0.05 –40 °C to +85°C DBQ QSOP-20 DBQ ADS8344E Rails, 56 " " " " " " " ADS8344E/2K5 Tape and Reel, 2500 ADS8344N " " " DB SSOP-20 DB ADS8344N Rails, 68 " " " " " " " ADS8344N/1K Tape and Reel, 1000 ADS8344EB 6 ±0.024 –40 °C to +85°C DBQ QSOP-20 DBQ ADS8344EB Rails, 56 " " " " " " " ADS8344EB/2K5 Tape and Reel, 2500 ADS8344NB " " " DB SSOP-20 DB ADS8344NB Rails, 68 " " " " " " " ADS8344NB/1K Tape and Reel, 1000 NOTE: (1) For the most current package and ordering information, see the Package Option Addendum at the end of this data sheet, or see the TI web site at www.ti.com. PACKAGE/ORDERING INFORMATION(1) ABSOLUTE MAXIMUM RATINGS(1) +VCC to GND ........................................................................ –0.3V to +6V Analog Inputs to GND ............................................ –0.3V to +VCC + 0.3V Digital Inputs to GND ........................................................... –0.3V to +6V Power Dissipation .......................................................................... 250mW Maximum Junction Temperature ................................................... +150 °C Operating Temperature Range ........................................ –40 °C to +85°C Storage Temperature Range ......................................... –65 °C to +150°C Lead Temperature (soldering, 10s) ............................................... +300 °C NOTE: (1) Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to absolute maximum conditions for extended periods may affect device reliability. PIN CONFIGURATION Top View SSOP PIN DESCRIPTIONS PIN NAME DESCRIPTION 1 CH0 Analog Input Channel 0 2 CH1 Analog Input Channel 1 3 CH2 Analog Input Channel 2 4 CH3 Analog Input Channel 3 5 CH4 Analog Input Channel 4 6 CH5 Analog Input Channel 5 7 CH6 Analog Input Channel 6 8 CH7 Analog Input Channel 7 9 COM Ground reference for analog inputs. Sets zero code voltage in single–ended mode. Connect this pin to ground or ground reference point. 10 SHDN Shutdown. When LOW, the device enters a very low-power shutdown mode. 11 VREF Voltage Reference Input. See Electrical Characteristics Table for ranges. 12 +VCC Power Supply, 2.7V to 5V 13 GND Ground 14 GND Ground 15 DOUT Serial Data Output. Data is shifted on the falling edge of DCLK. This output is high impedance when CS is HIGH. 16 BUSY Busy Output. Busy goes LOW when the DIN control bits are being read and also when the device is converting. The Output is high impedance when CS is HIGH. 17 DIN Serial Data Input. If CS is LOW, data is latched on rising edge of DCLK. 18 CS Chip Select Input. Active LOW. Data will not be clocked into DIN unless CS is LOW. When CS is HIGH, DOUT is high impedance. 19 DCLK External Clock Input. The clock speed determines the conversion rate by the equation fDCLK = 24 • fSAMPLE. 20 +VCC Power Supply 1 2 3 4 5 6 7 8 9 10 CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 COM SHDN +V CC DCLK CS D IN BUSY D OUT GND GND +V CC V REF 20 19 18 17 16 15 14 13 12 11 ADS8344 ELECTROSTATIC DISCHARGE SENSITIVITY This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation proce- dures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. |
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