| 数据搜索系统,热门电子元器件搜索 |
|
AD2S80ASD/883B 数据表(PDF) 13 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
AD2S80ASD/883B 数据表(HTML) 13 Page - Analog Devices |
|
13 / 16 page ![]() AD2S80A REV. B –13– VELOCITY ERRORS The signal at the INTEGRATOR OUTPUT pin relative to the ANALOG GROUND pin is an analog voltage proportional to the rate of change of the input angle. This signal can be used to stabilize servo loops or in the place of a velocity transducer. Although the conversion loop of the AD2S80A includes a digital section there is an additional analog feedback loop around the velocity signal. This ensures against flicker in the digital posi- tional output in both dynamic and static states. A better quality velocity signal will be achieved if the following points are considered: 1. Protection. The velocity signal should be buffered before use. 2. Reversion error. 1 The reversion error can be nulled by varying one supply rail relative to the other. 3. Ripple and Noise. Noise on the input signals to the converter is the major cause of noise on the velocity signal. This can be reduced to a minimum if the following precautions are taken: The resolver is connected to the converter using separate twisted pair cable for the sine, cosine and reference signals. Care is taken to reduce the external noise wherever possible. An HF filter is fltted before the Phase Sensitive Demodulator (as described in the section HF FILTER). A resolver is chosen that has low residual voltage, i.e., a small signal in quadrature with the reference. Components are selected to operate the AD2S80A with the lowest acceptable bandwidth. Feedthrough of the reference frequency should be removed by a filter on the velocity signal. Maintenance of the input signal voltages at 2 V rms will prevent LSB flicker at the positional output. The analog feedback or hysteresis employed around the VCO and the intergrator is a function of the input signal levels (see sec- tion “INTEGRATOR”) . Following the preceding precautions will allow the user to use the velocity signal in very noisy environments, for example, PWM motor drive applications. Resolver/converter error curves may exhibit apparent acceleration/deceleration at a constant velocity. This results in ripple on the velocity signal of frequency twice the input rotation. 1Reversion error, or side-to-side nonlinearity, is a result of differences in the up and down rates of the VCO. SOURCES OF ERRORS Integrator Offset Additional inaccuracies in the conversion of the resolver signals will result from an offset at the input to the integrator as it will be treated as an error signal. This error will typically be 1 arc minute over the operating temperature range. A description of how to adjust from zero offset is given in the section “COMPONENT SELECTION” and the circuit required is shown in Figure 1. Differential Phase Shift Phase shift between the sine and cosine signals from the resolver is known as differential phase shift and can cause static error. Some differential phase shift will be present on all resolvers as a result of coupling. A small resolver residual voltage (quadrature voltage) indicates a small differential phase shift. Additional phase shift can be introduced if the sine channel wires and the cosine channel wires are treated differently. For instance, different cable lengths or different loads could cause differential phase shift. The additional error caused by differential phase shift on the input signals approximates to Error = 0.53 a × b arc minutes where a = differential phase shift (degrees). b = signal to reference phase shift (degrees). This error can be minimized by choosing a resolver with a small residual voltage, ensuring that the sine and cosine signals are handled identically and removing the reference phase shift (see section “CONNECTING THE RESOLVER”). By taking these precautions the extra error can be made insignificant. Under static operating conditions phase shift between the refer- ence and the signal lines alone will not theoretically affect the converter’s static accuracy. However, most resolvers exhibit a phase shift between the signal and the reference. This phase shift will give rise under dynamic conditions to an additional error defined by: Shaft Speed (rps) × Phase Shift (Degrees ) Reference Frequency For example, for a phase shift of 20 degrees, a shaft rotation of 22 rps and a reference frequency of 5 kHz, the converter will exhibit an additional error of: 22 × 20 5000 0.088 Degrees This effect can be eliminated by placing a phase shift in the reference to the converter equivalent to the phase shift in the resolver (see section “CONNECTING THE RESOLVER”). Note: Capacitive and inductive crosstalk in the signal and reference leads and wiring can cause similar problems. |
|
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |