AD5246

Data Sheet

Rev. C | Page 14 of 16

A repeated write function gives the user flexibility to update the

RDAC output a number of times after addressing the part only

once. For example, after the RDAC has acknowledged its slave

address in write mode, the RDAC output updates on each succes-

sive byte. If different instructions are needed, the write/read mode

has to start again with a new slave address and data byte.

Similarly, a repeated read function of the RDAC is also allowed.

LEVEL SHIFTING FOR BIDIRECTIONAL INTERFACE

While most legacy systems may be operated at one voltage,

a new component may be optimized at another. When two

systems operate the same signal at two different voltages, proper

level shifting is needed. For instance, one can use a 1.8 V

shifting scheme is needed to enable a bidirectional communi-

cation so that the setting of the digital potentiometer can be

one of the implementations. M1 and M2 can be any N channel

threshold FETs such as the FDV301N.

AD5246

SDA1

SCL1

D

G

1.8V

5V

S

M1

SCL2

SDA2

G

S

M2

D

Figure 30. Level Shifting for Operation at Different Potentials

ESD PROTECTION

All digital inputs are protected with a series input resistor

and parallel Zener ESD structures, as shown in Figure 31.

This applies to the digital input pins SDA and SCL.

LOGIC

340

Ω

GND

Figure 31. ESD Protection of Digital Pins

TERMINAL VOLTAGE OPERATING RANGE

conditions for proper 3-terminal digital potentiometer

operation. Supply signals present on Terminal B and

the internal forward biased diodes (see Figure 32).

B

W

GND

MAXIMUM OPERATING CURRENT

At low code values, the user should be aware that due to low

resistance values, the current through the RDAC may exceed

the 5 mA limit. In Figure 33, a 5 V supply is placed on the

wiper, and the current through Terminal W and Terminal B is

plotted with respect to code. A line is also drawn denoting the

5 mA current limit. Note that at low code values (particularly

for the 5 kΩ and 10 kΩ options), the current level increases

significantly. Care should be taken to limit the current flow

between W and B in this state to a maximum continuous

current of 5 mA and a maximum pulse current of no more than

20 mA. Otherwise, degradation or possible destruction of the

internal switch contacts can occur.

CODE (Decimal)

0

0.01

0.1

1

10

16

32

48

64

80

96

112

128

100

5mA CURRENT LIMIT

Figure 33. Maximum Operating Current

POWER-UP SEQUENCE

Since the ESD protection diodes limit the voltage compliance

at Terminal B and Terminal W (see Figure 32), it is important

and Terminal W; otherwise, the diode is forward biased such

the user’s circuit. The ideal power-up sequence is in the follow-