AD9974BBCZ datasheet(39/52 Pages) AD

39 / 52 page

AD9974

Rev. A | Page 39 of 52

3-WIRE SERIAL INTERFACE TIMING

All of the internal registers of the AD9974 are accessed through

a 3-wire serial interface. Each register consists of a 12-bit address

and a 28-bit data-word. Both the 12-bit address and 28-bit data-

word are written starting with the LSB. To write to each register,

a 40-bit operation is required, as shown in Figure 52. Although

many registers are fewer than 28 bits wide, all 28 bits must be

written for each register. For example, if the register is only 20 bits

wide, the upper eight bits are don’t cares and must be filled with

0s during the serial write operation. If fewer than 28 data bits

are written, the register is not updated with new data.

Figure 53 shows a more efficient way to write to the registers,

using the AD9974 address auto-increment capability. Using this

method, the lowest desired address is written first, followed by

multiple 28-bit data-words. Each new 28-bit data-word is

automatically written to the next highest register address. By

eliminating the need to write each 12-bit address, faster register

loading is achieved. Continuous write operations can be used,

starting with any register location.

SDATA

A0A1

A8A9

A10

A11

D25

D26

D27

tLS

tDS

12-BIT ADDRESS

28-BIT DATA

1213141516

tLH

tDH

NOTES

1. SDATA BITS ARE LATCHED ON SCK RISING EDGES. SCK CAN IDLE HIGH OR LOW BETWEEN WRITE OPERATIONS.

2. ALL 40 BITS MUST BE WRITTEN: 12 BITS FOR ADDRESS AND 28 BITS FOR DATA.

3. IF THE REGISTER LENGTH IS <28 BITS, THEN ZEROS MUST BE USED TO COMPLETE THE 28-BIT DATA LENGTH.

4. NEW DATA VALUES ARE UPDATED IN THE SPECIFIED REGISTER LOCATION AT DIFFERENT TIMES, DEPENDING ON THE

PARTICULAR REGISTER WRITTEN TO. SEE THE UPDATING OF NEW REGISTER VALUES SECTION FOR MORE INFORMATION.

SCK

Figure 52. Serial Write Operation

SDATA

A0A1

A10

A11

D0D1

D26

D27

SCK

NOTES

1. MULTIPLE SEQUENTIAL REGISTERS CAN BE LOADED CONTINUOUSLY.

2. THE FIRST (LOWEST ADDRESS) REGISTER ADDRESS IS WRITTEN, FOLLOWED BY MULTIPLE 28-BIT DATA-WORDS.

3. THE ADDRESS AUTOMATICALLY INCREMENTS WITH EACH 28-BIT DATA-WORD (ALL 28 BITS MUST BE WRITTEN).

4. SL IS HELD LOW UNTIL THE LAST DESIRED REGISTER HAS BEEN LOADED.

D26

D27

DATA FOR STARTING

DATA FOR NEXT

121314

Figure 53. Continuous Serial Write Operation

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