AD9852SLASHPCB datasheet(18/52 Pages) AD

18 / 52 page

AD9852

Rev. E | Page 18 of 52

MODES OF OPERATION

There are five programmable modes of operation of the AD9852.

Selecting a mode requires that three bits in the control register

(Parallel Address 1F hex) be programmed as shown in Table 6.

Table 6. Mode Selection Table

Mode 2

Mode 1

Mode 0

Result

Single tone

FSK

Ramped FSK

Chirp

BPSK

In each mode, engaging certain functions may be prohibited.

Table 7 lists some important functions and their availability for

each mode.

SINGLE TONE (MODE 000)

When the MASTER RESET pin is asserted, single-tone mode

becomes the default. The user can also access this mode by

programming it into the control register. The phase accumulator,

responsible for generating an output frequency, is presented with

a 48-bit value from the Frequency Tuning Word 1 registers with

default values of 0. Default values from the remaining applicable

registers further define the single-tone output signal qualities.

The default values after a master reset configures the device

with an output signal of 0 Hz and zero phase. Upon power-up

and reset, the output from both DACs is a dc value equal to the

midscale output current. This is the default mode amplitude setting

of 0. Refer to the On/Off Output Shaped Keying (OSK) section

for further explanation of the output amplitude control. It is

necessary to program all or some of the 28 program registers to

produce a user-defined output signal. Figure 32 shows the

transition from the default condition (0 Hz) to a user-defined

output frequency (F1).

As with all Analog Devices DDS devices, the value of the frequency

tuning word is determined using the following equation:

FTW = (Desired Output Frequency × 2N)/SYSCLK

where:

N is the phase accumulator resolution (48 bits in this instance).

Desired Output Frequency is expressed in hertz.

FTW (frequency tuning word) is a decimal number.

After a decimal number has been calculated, it must be rounded

to an integer and then converted to binary format—a series of

48 binary-weighted 1s and 0s. The fundamental sine wave DAC

output frequency range is from dc to one-half SYSCLK.

Changes in frequency are phase continuous; therefore, the first

sampled phase value of the new frequency is referenced from the

time of the last sampled phase value of the previous frequency.

The 14-bit phase register adjusts the cosine DAC’s output phase.

The single-tone mode allows the user to control the following

signal qualities:

•

Output frequency to 48-bit accuracy

•

Output amplitude to 12-bit accuracy

•

Fixed, user-defined amplitude control

•

Variable, programmable amplitude control

•

Automatic, programmable, single-pin-controlled

on/off output shaped keying

•

Output phase to 14-bit accuracy

Furthermore, all of these qualities can be changed or modulated

via the 8-bit parallel programming port at a 100 MHz parallel

byte rate or at a 10 MHz serial rate. Incorporating this attribute

permits FM, AM, PM, FSK, PSK, and ASK operation in the

single-tone mode.

000 (SINGLE TONE)

MODE

TW1

000 (DEFAULT)

FREQUENCY

MASTER RESET

I/O UD CLK

Figure 32. Default State to User-Defined Output Transition

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