ADM1069ASTZ datasheet(25/32 Pages) AD

25 / 32 page

ADM1069

Rev. C | Page 25 of 32

POWER-UP

(VCC > 2.5V)

EEPROM

SMBus

DEVICE

CONTROLLER

LATCH A

LATCH B

FUNCTION

(OV THRESHOLD

ON VP1)

Figure 35. Configuration Update Flow Diagram

UPDATING THE SEQUENCING ENGINE

Sequencing engine (SE) functions are not updated in the same

way as regular configuration latches. The SE has its own dedicated

512-byte EEPROM for storing state definitions, providing 63

individual states, each with a 64-bit word (one state is reserved).

At power-up, the first state is loaded from the SE EEPROM into

the engine itself. When the conditions of this state are met, the

next state is loaded from the EEPROM into the engine, and so

on. The loading of each new state takes approximately 10 μs.

To alter a state, the required changes must be made directly to

the EEPROM. RAM for each state does not exist. The relevant

alterations must be made to the 64-bit word, which is then

uploaded directly to the EEPROM.

INTERNAL REGISTERS

The ADM1069 contains a large number of data registers.

The principal registers are the address pointer register and

the configuration registers.

Address Pointer Register

The address pointer register contains the address that selects one

of the other internal registers. When writing to the ADM1069,

the first byte of data is always a register address that is written to

the address pointer register.

Configuration Registers

The configuration registers provide control and configuration

for various operating parameters of the ADM1069.

EEPROM

The ADM1069 has two 512-byte cells of nonvolatile, electrically

erasable, programmable read-only memory (EEPROM), from

EEPROM is used for permanent storage of data that is not lost

when the ADM1069 is powered down. One EEPROM cell contains

the configuration data of the device; the other contains the state

definitions for the SE. Although referred to as read-only memory,

the EEPROM can be written to, as well as read from, using the

serial bus in exactly the same way as the other registers.

The major differences between the EEPROM and other

registers are as follows:

•

An EEPROM location must be blank before it can be

written to. If it contains data, the data must first be erased.

•

Writing to the EEPROM is slower than writing to the RAM.

•

Writing to the EEPROM should be restricted because it has

a limited write/cycle life of typically 10,000 write operations,

due to the usual EEPROM wear-out mechanisms.

The first EEPROM is split into 16 (0 to 15) pages of 32 bytes each.

Page 0 to Page 6, starting at Address 0xF800, hold the configuration

data for the applications on the ADM1069 (such as the SFDs

and PDOs). These EEPROM addresses are the same as the RAM

Page 15 are for customer use.

Data can be downloaded from the EEPROM to the RAM in one

of the following ways:

•

At power-up, when Page 0 to Page 6 are downloaded.

•

By setting Bit 0 of the UDOWNLD register (0xD8), which

performs a user download of Page 0 to Page 6.

SERIAL BUS INTERFACE

The ADM1069 is controlled via the serial system management

bus (SMBus) and is connected to this bus as a slave device,

under the control of a master device. It takes approximately

1 ms after power-up for the ADM1069 to download from its

EEPROM. Therefore, access to the ADM1069 is restricted until

the download is complete.

Identifying the ADM1069 on the SMBus

The ADM1069 has a 7-bit serial bus slave address (see Table 11).

The device is powered up with a default serial bus address. The

five MSBs of the address are set to 10011; the two LSBs are

determined by the logical states of Pin A1 and Pin A0. This

allows the connection of four ADM1069s to one SMBus.

Table 11. Serial Bus Slave Address

A1 Pin

A0 Pin

Hex Address

7-Bit Address

Low

0x98

1001100x1

Low

High

0x9A

1001101x1

High

Low

0x9C

1001110x1

High

0x9E

1001111x1

1 x = Read/write bit. The address is shown only as the first 7 MSBs.

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