ADM1069ACPZ datasheet(22/32 Pages) AD

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ADM1069

Rev. C | Page 22 of 32

OUTPUT

DC-TO-DC

CONVERTER

FEEDBACK

GND

ATTENUATION

RESISTOR

PCB

TRACE NOISE

DECOUPLING

CAPACITOR

VH/VPx/VXx

ADM1069

DACx

MUX

ADC

DAC

DEVICE

CONTROLLER

(SMBus)

MICROCONTROLLER

VIN

Figure 33. Closed-Loop Margining System Using the ADM1069

WRITING TO THE DACS

Four DAC ranges are offered. They can be placed with midcode

(Code 0x7F) at 0.6 V, 0.8 V, 1.0 V, and 1.25 V. These voltages are

placed to correspond to the most common feedback voltages.

Centering the DAC outputs in this way provides the best use of

the DAC resolution. For most supplies, it is possible to place the

DAC midcode at the point where the dc-to-dc converter output

is not modified, thereby giving half of the DAC range to margin

up and the other half to margin down.

The DAC output voltage is set by the code written to the DACx

in this register. Code 0x7F is placed at the midcode voltage, as

described previously. The output voltage is given by

DAC Output = (DACx − 0x7F)/255 × 0.6015 + VOFF

where VOFF is one of the four offset voltages.

There are 256 DAC settings available. The midcode value is

located at DAC Code 0x7F, as close as possible to the middle

of the 256 code range. The full output swing of the DACs is

+302 mV (+128 codes) and −300 mV (−127 codes) around the

selected midcode voltage. The voltage range for each midcode

voltage is shown in Table 10.

Table 10. Ranges for Midcode Voltages

Midcode

Voltage (V)

Minimum Voltage

Output (V)

Maximum Voltage

Output (V)

0.6

0.300

0.902

0.8

0.500

1.102

1.0

0.700

1.302

1.25

0.950

1.552

CHOOSING THE SIZE OF THE ATTENUATION

RESISTOR

The size of the attenuation resistor, R3, determines how much

the DAC voltage swing affects the output voltage of the dc-to-dc

converter that is being margined (see Figure 33).

Because the voltage at the feedback pin remains constant, the

current flowing from the feedback node to GND through R2 is

a constant. In addition, the feedback node itself is high impedance.

This means that the current flowing through R1 is the same as

the current flowing through R3. Therefore, a direct relationship

exists between the extra voltage drop across R1 during margining

and the voltage drop across R3.

This relationship is given by the following equation:

ΔVOUT =

(VFB − VDACOUT)

where:

ΔVOUT is the change in VOUT.

VFB is the voltage at the feedback node of the dc-to-dc converter.

VDACOUT is the voltage output of the margining DAC.

This equation demonstrates that if the user wants the output

voltage to change by ±300 mV, then R1 = R3. If the user wants

the output voltage to change by ±600 mV, R1 = 2 × R3, and so on.

It is best to use the full DAC output range to margin a supply.

Choosing the attenuation resistor in this way provides the most

resolution from the DAC, meaning that with one DAC code

change, the smallest effect on the dc-to-dc converter output

voltage is induced. If the resistor is sized up to use a code such

as 27 decimal to 227 decimal to move the dc-to-dc converter

output by ±5%, it takes 100 codes to move 5% (each code moves

the output by 0.05%). This is beyond the readback accuracy of

the ADC, but it should not prevent the user from building a

circuit to use the most resolution.

DAC LIMITING AND OTHER SAFETY FEATURES

Limit registers (called DPLIMx and DNLIMx) on the device

offer the user some protection from firmware bugs that can

cause catastrophic board problems by forcing supplies beyond

their allowable output ranges. Essentially, the DAC code written

into the DACx register is clipped such that the code used to set

the DAC voltage is given by

DAC Code

= DACx, DACx ≥ DNLIMx and DACx ≤ DPLIMx

= DNLIMx,

DACx < DNLIMx

= DPLIMx,

DACx > DPLIMx

In addition, the DAC output buffer is three-stated if DNLIMx >

DPLIMx. By programming the limit registers this way, the user

can make it very difficult for the DAC output buffers to be turned

on during normal system operation. The limit registers are among

the registers downloaded from EEPROM at startup.

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