ADP5589ACPZ-00-R7 datasheet(42/52 Pages) AD

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ADP5589

Data Sheet

Rev. B | Page 42 of 52

Bits

Name

R/W

Description

[1:0]

RESET_PULSE_WIDTH[1:0]

R/W

Defines the pulse width of the reset signals.

Parameter common to both RESET1 and RESET2.

00 = 500 µs.

01 = 1 ms.

10 = 2 ms.

11 = 10 ms.

ADP5589AC_Z-00-R7, ADP5589AC_Z-02-R7 Default = 0000 0000

ADP5589AC_Z-01-R7 Default = 0010 0000

PWM_OFFT_LOW Register 0x3E

Table 70. PWM_OFFT_LOW Bit Descriptions

Bits

Name

R/W

Description

[7: 0]

PWM_OFFT_LOW_BYTE[7:0]

R/W

Lower eight bits of PWM off time.

PWM_OFFT_HIGH Register 0x3F

Table 71. PWM_OFFT_HIGH Bit Descriptions

Bits

Name

R/W

Description

[7: 0]

PWM_OFFT_HIGH_BYTE[7:0]

R/W

Upper eight bits of PWM off time.

PWM_ONT_LOW Register 0x40

Table 72. PWM_ONT_LOW Bit Descriptions

Bits

Name

R/W

Description

[7:0]

PWM_ONT_LOW_BYTE[7:0]

R/W

Lower eight bits of PWM on time.

PWM_ONT_HIGH Register 0x41

Table 73. PWM_ONT_HIGH Bit Descriptions

Bits

Name

R/W

Description

[7:0]

PWM_ONT_HIGH_BYTE[7:0]

R/W

Upper eight bits of PWM on time. Note that updated PWM times are not latched until this

byte is written to. PWM count times are referenced from the internal oscillator. The fastest

oscillator setting is 500 kHz (1 µs increments). Therefore, maximum on/off time is

1 µs × (216 −1) = 65.5 ms

This gives PWM frequencies from 500 kHz down to 7.6 Hz.

PWM_CFG Register 0x42

Table 74. PWM_CFG Bit Descriptions

Bits

Name

R/W

Description

[7:3]

Reserved.

PWM_IN_AND

R/W

AND the internally generated PWM signal with an externally supplied PWM signal (C6).

PWM_MODE

R/W

Defines PWM mode.

0 = continuous.

1 = one shot.

If a one-shot is performed, the PWM_EN bit is automatically cleared.

If a second one-shot must be performed, the user must set PWM_EN again.

PWM_EN

R/W

Enable PWM generator.

ADP5589ACPZ-00-R7 数据表(PDF) 42 Page - Analog Devices

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ADP5589ACPZ-00-R7 数据表(PDF) 42 Page - Analog Devices

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