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VIPER37LE 数据表(PDF) 26 Page - STMicroelectronics

部件名 VIPER37LE
功能描述  VIPerPlus family: fixed frequency offline converter
PDF  35 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

VIPER37LE 数据表(HTML) 26 Page - STMicroelectronics

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Operation description
VIPER37
26/35
Doc ID 022218 Rev 1
8.10
Feedback and overload protection (OLP)
The device is a current mode converter: the feedback pin controls the PWM operation,
controls the burst mode, and actives the overload protection.
Figure 30 and Figure 31 show
the internal current mode structure.
With the feedback pin voltage between VFBbm and VFBlin, (see Table 8) the drain current is
sensed and converted into voltage that is applied to the non-inverting pin of the PWM
comparator.
This voltage is compared with the one on the feedback pin through a voltage divider on a
cycle-by-cycle basis. When these two voltages are equal, the PWM logic orders the switch-
off of the Power MOSFET. The drain current is always limited to the IDlim value.
In case of overload, the feedback pin increases in reaction to this event and when it goes
higher than VFBlin, the PWM comparator is disabled and the drain current is limited to IDlim by
the OCP comparator, see
Figure 2.
When the feedback pin voltage reaches the threshold VFBlin, an internal current generator
starts to charge the feedback capacitor (CFB) and when the feedback voltage reaches the
VFBolp threshold, the converter is turned off and the startup phase is activated with a reduced
value of IDDch to 0.6 mA, see Table 7.
During the first startup phase of the converter, after the soft-start time (tSS), the output
voltage may force the feedback pin voltage to rise up to the VFBolp threshold that switches off
the converter itself.
To avoid this event, the appropriate feedback network must be selected according to the
output load. Moreover, the feedback network fixes the compensation loop stability.
Figure 30
and
Figure 31 show the two different feedback networks.
The time from the overload detection (VFB = VFBlin) to the device shutdown
(VFB = VFBolp) can be set by the CFB value (see Figure 30 and Figure 31), using the formula:
Equation 5
where IFB is the value, reported in Table 8, when the FB voltage is between VFBlin and
VFBolp.
In
Figure 30, the capacitor connected to the FB pin (CFB) is part of the compensation circuit
as well as being necessary to activate the overload protection.
Table 11.
CONT pin configurations
Function / component
RLIM
(1)
1.
RLIM must be fixed before ROVP.
ROVP
DAUX
IDlim reduction
See
Figure 16
No
No
OVP
≥ 80 kΩ
See
Equation 4
Yes
IDlim reduction + OVP
See
Figure 16
See
Equation 4
Yes
T
OLP
delay
C
FB
V
FBolp
V
FBlin
I
FB
----------------------------------------
×
=



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