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ADL5375ACPZ-R7 数据表(PDF) 21 Page - Analog Devices |
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ADL5375ACPZ-R7 数据表(HTML) 21 Page - Analog Devices |
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21 / 36 page ![]() Data Sheet ADL5375 Rev. C | Page 21 of 36 OUTPUT DISABLE The ADL5375 incorporates an output disable pin feature that shuts down the output amplifier stage to isolate the modulator from the load. This output is disabled when the voltage on the DSOP exceeds 2 V. The output is enabled when the DSOP pin is either tied to ground or left unconnected. Asserting DSOP further reduces LO leakage (see Figure 27 and Figure 52) and drives the broadband noise of the device down to just above the KT thermal noise level. Asserting DSOP also reduces the supply current of the ADL5375 from 200 mA to 127 mA. The time delay between when DSOP pin going low and the output power being restored is approximately 200 ns. The time delay when DSOP going high and output being disabled is less than 100 ns. |
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