VBIAS

HB

CS

SYNC

ENABLE

PGND

AGND

LEVEL

SHIFT

CLK

HS

ERROR AMP

(Sink Only)

R

S

Q

Q

UVLO

7V LDO

REGULATOR

HO

DRIVER

LO

DRIVER

RAMP

75k

SS

FB

COMP

PWM

COMPARATOR

CURRENT SENSE AMP

Gain = 16

CO

NEGATIVE

CURRENT

DETECTOR

7V

1.27V

2V

40k

100k

0.7V

BUFFER

0.75V

300 PA

ILIMIT AMP

Gm = 16 mA/V

(Sink Only)

1V

1.27V

175k

120k

ADAPTIVE

DEAD TIME

DELAY

THERMAL

LIMIT

LOGIC

CV

2.5k

15 PA

CLK

2.5k

CRMIX

x 3

Vbias

LM5115

www.ti.com

SNVS343E – MARCH 2005 – REVISED MARCH 2013

Pin Descriptions (continued)

Pin

Name

Description

Application Information

16

VBIAS

Supply Bias Input

Input to the LDO bias regulator and current sense amplifier that

powers internal blocks. Input range of VBIAS is 4.5V to 30V.

-

Exposed Pad Exposed Pad, underside of WSON package

Internally bonded to the die substrate. Connect to system ground

(WSON

for low thermal impedance.

Package

Only)

Block Diagram

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Copyright © 2005–2013, Texas Instruments Incorporated

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