ADP5585ACBZ-02-R7 datasheet(12/40 Pages) AD

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ADP5585

Data Sheet

Rev. C | Page 12 of 40

GPI INPUT

Each of the 10 input/output lines can be configured as a

general-purpose logic input line. Figure 15 shows a detailed

representation of the GPI scan and detect block and its

associated control and status signals.

PIN_CONFIG_A[7:0]

PIN_CONFIG_B[7:0]

GPI_INT

GPIO 1

GPIO 2

GPIO 3

GPIO 4

GPIO 5

GPIO 6

GPIO 7

GPIO 8

GPIO 9

(R0)

(R1)

(R2)

(R3)

(R4)

RST/(R5)

(C0)

(C1)

(C2)

GPIO 10

GPIO 11

(C3)

(C4)

GPI EVENT

KEY EVENT

OVRFLOW_INT

LOGIC EVENT

GPI_INT_LEVEL_A[7:0]

GPI_INT_LEVEL_B[7:0]

GPI_INTERRUPT_EN_A[7:0]

GPIO_DIRECTION_A[7:0]

GPI_STATUS_A[5:0]

GPI_STATUS_B[4:0]

GPI_INT_STAT_A[5:0]

GPI_EVENT_EN_A[7:0]

GPIO_DIRECTION_B[7:0]

GPI_INTERRUPT_EN_B[7:0]

GPI_EVENT_EN_B[7:0]

EVENT_INT

GPI_INT_STAT_B[4:0]

RESET_TRIG_TIME[2:0]

RESET1_EVENT_A[7:0]

RESET1_EVENT_B[7:0]

RESET1_EVENT_C[7:0]

RESET2_EVENT_A[7:0]

RESET2_EVENT_B[7:0]

FIFO1:FIFO16

EC[4:0]

FIFO

UPDATE

GPI SCAN

CONTROL

I2C BUSY

Figure 15. GPI Scan and Detect Block

The current input state of each GPI can be read back using the

GPI_STATUS_x registers. Each GPI can be programmed to

generate an interrupt via the GPI_INTERRUPT_EN_x registers.

The interrupt status is stored in the GPI_INT_STAT_x registers.

GPI interrupts can be programmed to trigger on the positive or

negative edge by configuring the GPI_INT_LEVEL_x registers.

If any of the GPI interrupts is triggered, the master GPI_INT

interrupt is also triggered. Figure 16 shows a single GPI and

how it affects its corresponding status and interrupt status bits.

GPI 3

GPI_STATUS_A[3]

GPI_INTERRUPT_EN_A[3]

GPI_INT_STAT_A[3]

GPI_INT

GPI_INT_LEVEL_A[3]

CLEARED

BY READ

CLEARED

BY WRITE ‘1’

Figure 16. Single GPI Example

GPIs can be programmed to generate FIFO events via the

GPI_EVENT_EN_x registers. GPIs in this mode do not generate

GPI_INT interrupts and instead generate EVENT_INT interrupts.

Figure 17 shows several GPI lines and their effects on the FIFO

and event count, EC[4:0].

GPI 2

GPI SCAN

EVENT_INT

EC[4:0]

GPI 2 ACTIVE

GPI 4

GPI 7

GPI 7 ACTIVE

GPI 4 ACTIVE

GPI 4 INACTIVE

GPI 7 INACTIVE

GPI 2 INACTIVE

FIFO

Figure 17. Multiple GPI Example

The GPI scanner is idle until it detects a level transition. It scans

the GPI inputs and updates accordingly. It then returns to idle

immediately, it does not scan/wait, like the key scanner. As

such, the GPI scanner can detect narrow pulses once they get

past the 50 μs input debounce filter.

GPO OUTPUT

Each of the 10 input/output lines can be configured as a general-

purpose output (GPO) line. Figure 6 shows a detailed diagram

of the I/O structure. See the Detailed Register Descriptions

section for GPO configuration and usage.

LOGIC BLOCKS

Several of the ADP5585 input/output lines can be used as inputs

and outputs for implementing some common logic functions.

The R1, R2, and R3 input/output pins can be used as inputs,

and the R0 input/output pin can be used as an output for the

logic block.

The outputs from the logic blocks can be configured to generate

interrupts. They can also be configured to generate events on

the FIFO.

Figure 19 shows a detailed diagram of the internal make-up of

the logic block, illustrating the possible logic functions that can

be implemented.

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