AD8541/AD8542/AD8544

Rev. G | Page 16 of 20

OUTLINE DIMENSIONS

COMPLIANT TO JEDEC STANDARDS MO-178-AA

10°

5°

0°

SEATING

PLANE

1.90

BSC

0.95 BSC

0.60

BSC

5

12

3

4

3.00

2.90

2.80

3.00

2.80

2.60

1.70

1.60

1.50

1.30

1.15

0.90

0.15 MAX

0.05 MIN

1.45 MAX

0.95 MIN

0.20 MAX

0.08 MIN

0.50 MAX

0.35 MIN

0.55

0.45

0.35

Figure 41. 5-Lead Small Outline Transistor Package [SOT-23]

(RJ-5)

Dimensions shown in millimeters

COMPLIANT TO JEDEC STANDARDS MO-153-AB-1

8°

0°

4.50

4.40

4.30

14

8

7

1

6.40

BSC

PIN 1

5.10

5.00

4.90

0.65 BSC

0.15

0.05

0.30

0.19

1.20

MAX

1.05

1.00

0.80

0.20

0.09

0.75

0.60

0.45

COPLANARITY

0.10

SEATING

PLANE

Figure 42. 14-Lead Thin Shrink Small Outline Package [TSSOP]

(RU-14)

Dimensions shown in millimeters