IX9908N datasheet(7/10 Pages) IXYS

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INTEGRATED CIRCUITS DIVISION

IX9908

R01

www.ixysic.com

2.2 Soft-Start

Once VCC reaches VVCC_on (typically 18V), the device

will initiate a soft-start sequence. This is intended to

minimize the electrical stresses on Q1, DOUT, DVCC,

and the transformer. The soft-start operates as shown

in Figure 3. The duration of this soft-start is 12mS

nominal and steps VCS, the current sense voltage, to

four values, as shown.

Figure 3. Soft-Start

2.3 Normal Operation

Because the IX9908 employs quasi-resonant

operation, its PWM switch-on is set by the zero

crossing of the auxiliary winding voltage, and the

switch-off is set by the current sense voltage.

2.3.1 Zero Crossing & Switch-On Determination

As the application schematic on Page 1 shows, the

voltage from the auxiliary winding is connected to the

zero crossing pin, ZCV, through an RC network. This

network provides a delay so that switch-on can occur

at voltage valley thus enhancing efficiency. The

required time delay,

t, should be approximately

one-fourth of the oscillation period (determined by

transformer primary inductor and drain-source

capacitance of Q1) minus the propagation delay from

zero-cross detect to Q1 switch-on, tdelay .

This time delay,

t, should be matched by adjusting

the RC network.

After Q1 is turned off, its VDS will show some

oscillation. This will also show on the ZCV input. To

avoid a mis-triggered Q1 turn-on, a ringing

suppression circuit is implemented. The suppression

time has two values that depend on the voltage at

ZCV. If VZCV is greater than 0.7V, then the time is

2.5

S nominal. If V

ZCV is less than 0.7V, then the time

is 42

S nominal. Turn-on of Q1 can not occur during

the suppression time, but does occur after a

zero-crossing is detected. In the case of a missed

zero-crossing, a maximum off-time is implemented.

After Q1 has been off for 42

S nominal (t

offMax), it is

turned back on.

2.3.2 Switch-Off Determination

In the application circuit the primary current is sensed

by RCS. The voltage across this resistor, VCS , is

applied to the CS input of the device. It is processed

internally (VCSINT = VCS(3) + 0.7V), and compared to

the voltage at the VR pin, which is a scaled version of

the rectified line voltage. When VCSINT > VR, the

power switch Q1 is turned off.

Leading-edge blanking is used to prevent a false

trigger caused by the voltage spike across RCS at the

moment of Q1 turn-on. This blanking time, tBLKCS , is

nominally 330nS. To prevent transformer saturation, a

maximum on-time circuit is implemented. Max on-time

for Q1 (GD=H) is 30

S nominal.

2.3.3 Foldback Point Correction

When the AC line voltage increases, the Q1 on-time

decreases, which increases the operating frequency.

As a result, with a constant primary current limit, the

output power increases. To provide output power

regulation with respect to line voltage, the internal

foldback point correction circuit varies the VCS limit.

The VCS limit is decreased in response to an increase

in AC line voltage. The relationship between VCSMax

and VIN is shown in Figure 4.

Figure 4. VCSMax vs. VIN

Time (ms)

01 2345 6 7 8 9 10111213 1415

0.0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

1.1

Maximum Current (Sense Voltage)

During Soft-Start

t =

tOSC

- tdelay

tRC = CZCV (RZCV1 // RZCV2)

IN (V)

100

150

200

250

300

350

400

450

0.6

0.7

0.8

0.9

1.0

1.1

Variation of V

CS Limit Voltage

According to the I

ZC Current

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