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LP2995M 数据表(PDF) 10 Page - Texas Instruments

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部件名 LP2995M
功能描述  LP2995 DDR Termination Regulator
PDF  22 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

LP2995M 数据表(HTML) 10 Page - Texas Instruments

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LP2995
+
+
VTT
PVIN
VDDQ
VREF
GND
AVIN
VSENSE
VDDQ
VDD
VTT
VREF
COUT
CIN
0
100
200
300
400
500
600
AIRFLOW (Linear Feet Per Minute)
45
46
47
48
49
50
51
0
1
2
3
4
NUMBER OF VIAS
40
50
60
70
80
90
100
LP2995
SNVS190M – FEBRUARY 2002 – REVISED MARCH 2013
www.ti.com
Figure 15. WQFN-16
θJA vs # of Vias (4 Layer JEDEC Board))
Additional improvements in lowering the
θJA can also be achieved with a constant airflow across the package.
Maintaining the same conditions as above and utilizing the 2x2 via array, Figure 16 shows how the
θJA varies
with airflow.
Figure 16.
θJA vs Airflow Speed (JEDEC Board with 4 Vias)
Typical Application Circuits
The typical application circuit used for SSTL-2 termination schemes with DDR-SDRAM can be seen in Figure 17.
Figure 17. SSTL-2 Implementation
10
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Copyright © 2002–2013, Texas Instruments Incorporated
Product Folder Links: LP2995



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