LM331N datasheet(2/20 Pages) TI

2 / 20 page

LM231, LM331

SNOSBI2B – JUNE 1999 – REVISED MARCH 2013

www.ti.com

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Absolute Maximum Ratings

(1) (2) (3)

Supply Voltage, VS

40V

Output Short Circuit to Ground

Continuous

Output Short Circuit to VCC

Continuous

Input Voltage

−0.2V to +VS

Package Dissipation at 25°C

1.25W (4)

Lead Temperature (Soldering, 10 sec.)

PDIP

260°C

ESD Susceptibility (5)

500V

(1)

Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not

apply when operating the device beyond its specified operating conditions.

(2)

All voltages are measured with respect to GND = 0V, unless otherwise noted.

(3)

If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.

(4)

The absolute maximum junction temperature (TJmax) for this device is 150°C. The maximum allowable power dissipation is dictated by

TJmax, the junction-to-ambient thermal resistance (θJA), and the ambient temperature TA, and can be calculated using the formula

PDmax = (TJmax - TA) / θJA. The values for maximum power dissipation will be reached only when the device is operated in a severe

fault condition (e.g., when input or output pins are driven beyond the power supply voltages, or the power supply polarity is reversed).

Obviously, such conditions should always be avoided.

(5)

Human body model, 100 pF discharged through a 1.5 k

Ω resistor.

Operating Ratings

(1)

Operating Ambient Temperature

LM231, LM231A

−25°C to +85°C

LM331, LM331A

0°C to +70°C

Supply Voltage, VS

+4V to +40V

(1)

All voltages are measured with respect to GND = 0V, unless otherwise noted.

Package Thermal Resistance

Package

θJ-A

8-Lead PDIP

100°C/W

Electrical Characteristics

All specifications apply in the circuit of Figure 16, with 4.0V

≤ VS ≤ 40V, TA=25°C, unless otherwise specified.

Parameter

Conditions

Min

Typ

Max

Units

4.5V

≤ VS ≤ 20V

±0.003

±0.01

% Full- Scale

VFC Non-Linearity (1)

TMIN ≤ TA ≤ TMAX

±0.006

±0.02

% Full- Scale

VFC Non-Linearity in Circuit of Figure 15

VS = 15V, f = 10 Hz to 11 kHz

±0.024

±0.14

%Full- Scale

Conversion Accuracy Scale Factor (Gain)

LM231, LM231A

VIN = −10V, RS = 14 kΩ

0.95

1.00

1.05

kHz/V

LM331, LM331A

0.90

1.00

1.10

kHz/V

Temperature Stability of Gain

LM231/LM331

TMIN ≤ TA ≤ TMAX, 4.5V ≤ VS ≤ 20V

±30

±150

ppm/°C

LM231A/LM331A

±20

±50

ppm/°C

4.5V

≤ VS ≤ 10V

0.01

0.1

%/V

Change of Gain with VS

10V

≤ VS ≤ 40V

0.006

0.06

%/V

Rated Full-Scale Frequency

VIN = −10V

10.0

kHz

Gain Stability vs. Time (1000 Hours)

TMIN ≤ TA ≤ TMAX

±0.02

% Full- Scale

(1)

Nonlinearity is defined as the deviation of fOUT from VIN × (10 kHz/−10 VDC) when the circuit has been trimmed for zero error at 10 Hz

and at 10 kHz, over the frequency range 1 Hz to 11 kHz. For the timing capacitor, CT, use NPO ceramic, Teflon

®, or polystyrene.

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