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PCF8537 数据表(PDF) 21 Page - NXP Semiconductors |
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PCF8537 数据表(HTML) 21 Page - NXP Semiconductors |
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21 / 82 page ![]() PCF8537 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 1 — 31 May 2012 21 of 82 NXP Semiconductors PCF8537 Industrial LCD driver for multiplex rates up to 1:8 Fig 10. Recommended power-down sequence when using an external supplied VLCD and the internal clock signal Fig 11. Recommended power-down sequence when using the internal charge pump and an external clock signal START Disable dis- play by setting bit E logic 0 Disable tem- perature mea- surement by setting bit TME logic 0 013aaa637 STOP Stop genera- tion of VLCD by setting bit CPE logic 0 START Disable dis- play by setting bit E logic 0 Disable tem- perature mea- surement by setting bit TME logic 0 013aaa638 STOP External clock may be switched off Bring pin CLK to 3-state by setting bit OSC and bit COE logic 0 |
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