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ST802RT1B 数据表(PDF) 17 Page - STMicroelectronics |
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ST802RT1B 数据表(HTML) 17 Page - STMicroelectronics |
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17 / 58 page  ST802RT1A, ST802RT1B Registers and descriptors description Doc ID 17049 Rev 1 17/58 6 Registers and descriptors description All of the management data control and status registers in the ST802RT1x's register set are accessed via a Write or Read operation on the serial MDIO port. This access requires a protocol described in the MII management interface section. 6.1 Register list Table 8. List of registers Address Reg. Index Name Default value Register description 00h – 0d RN00 CNTRL 0x0000 Control register 01h – 1d RN01 STATS 0x7849 Status register 02h – 2d RN02 PHYID1 0x0203 PHY identifier register Hi 03h – 3d RN03 PHYID2 0x8461 PHY identifier register Lo 04h – 4d RN04 LDADV 0x05E1 Auto-negotiation advertisement register 05h – 5d RN05 LPADV 0x0000 Auto-negotiation link partner ability register 06h – 6d RN06 ANEGX 0x0004 Auto-negotiation expansion register 07h – 7d RN07 LDNPG 0x2001 Auto-negotiation next page transmit register 08h – 8d RN08 LPNPG 0x0000 Auto-negotiation link partner received next page register Extended registers 10h – 16d RN10 XCNTL 0x1200 RMII-TEST control register 11h – 17d RN11 XSTAT 0x0000 Receiver configuration information and interrupt status register 12h – 18d RN12 XRCNT 0x0100 Receiver event interrupts register 13h – 19d RN13 XCCNT 0x0140 100Base-TX control register 14h – 20d RN14 XDCNT 0x000A Receiver mode control register 18h – 24d RN18 AUXCS 0x0027 Auxiliary control register 19h – 25d RN19 AUXSS 0x0000 Auxiliary status register 1Bh – 27d RN1B AUXM2 0x000A Auxiliary mode 2 register 1Ch – 28d RN1C TSTAT 0x0820 10Base-T error and general status register 1Eh – 30d RN1E AMPHY 0x0000 Auxiliary PHY register Shadow registers 1Fh - 31d RN1F BTEST 0x0000 Shadow Registers enable register 1Bh - 27d RS1B AUXS2 0x0000 MISC/status/error/test shadow register |
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