ADE7752A datasheet(20/24 Pages) AD

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ADE7752/ADE7752A

Rev. C | Page 20 of 24

TRANSFER FUNCTION

FREQUENCY OUTPUTS F1 AND F2

F1–7 = 0.60 Hz, SCF = S0 = S1 = 1

The ADE7752 calculates the product of six voltage signals (on

current channel and voltage channel) and then low-pass filters

this product to extract real power information. This real power

information is then converted to a frequency. The frequency

information is output on F1 and F2 in the form of active high

pulses. The pulse rate at these outputs is relatively low, such as

29.32 Hz maximum for ac signals with SCF = 1; S0 = S1 = 1 (see

Table 6). This means that the frequency at these outputs is

generated from real power information accumulated over a

relatively long period of time. The result is an output frequency

that is proportional to the average real power. The averaging of

the real power signal is implicit to the digital-to-frequency

conversion. The output frequency or pulse rate is related to the

input voltage signals by the following equation:

(

)

181

REF

Freq

−

where:

Freq = the output frequency on F1 and F2 (Hz).

VAN, VBN, and VCN = the differential rms voltage signal on voltage

channels (V).

IA, IB, and IC = the differential rms voltage signal on current

channels (V).

VREF = the reference voltage (2.4 V ± 8%) (V).

F1–7 = one of seven possible frequencies selected by using the

logic inputs SCF, S0, and S1 (see Table 5).

Table 5. F1–7 Frequency Selection1

SCF

F1–7 (Hz)

1.27

1.19

5.09

4.77

19.07

76.29

0.60

1 F1–7 is a fraction of the master clock and therefore varies if the specified

CLKIN frequency is altered.

Example 1

Thus, if full-scale differential dc voltages of +500 mV are

applied to VA, VB, VC, IA, IB, and IC, respectively (500 mV is

the maximum differential voltage that can be connected to

current and voltage channels), the expected output frequency is

calculated as follows:

= V

= IA = IB = IC = 500 mV dc =

0.5 V(rms of dc = dc)

VREF = 2.4 V (nominal reference value)

Note that if the on-chip reference is used, actual output fre-

quencies may vary from device to device due to reference

tolerance of ±8%.

483

181

Freq

Example 2

In this example, with ac voltages of ±500 mV peak applied to

the voltage channels and current channels, the expected output

frequency is calculated as follows:

()

value

reference

nominal

SCF

REF

Vrms

peak

500

−

Note that if the on-chip reference is used, actual output fre-

quencies may vary from device to device due to reference

tolerance of ±8%.

181

Freq

As can be seen from these two example calculations, the

maximum output frequency for ac inputs is always half of that

for dc input signals. The maximum frequency also depends on

the number of phases connected to the ADE7752. In a 3-phase

3-wire delta service, the maximum output frequency is different

from the maximum output frequency in a 3-phase

4-wire Wye service. The reason is that there are only two phases

connected to the analog inputs, but also that in a delta service,

the current channel input and voltage channel input of the same

phase are not in phase in normal operation.

Example 3

In this example, the ADE7752 is connected to a 3-phase 3-wire

delta service as shown in Figure 21. The total real energy

calculation processed in the ADE7752 can be expressed as

Total Real Power = (VA − VC) × IA + (VB − VC) × IB

where VA, VB, and VC

represent the voltage on Phase A, B, and

C, respectively. IA and IB

represent the current on Phase A and

B, respectively.

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