ADL5372

Rev. 0 | Page 20 of 24

FMOD TEST RACK

SINGLE TO DIFFERENTIAL

CIRCUIT BOARD

Q IN DCCM

AGND

I IN DCCM

VN1

VP1

I IN AC

Q IN AC

VPOS +5V

LO

0°

90°

IQ

QP

QN

AGILENT 34401A

MULTIMETER

0.200 ADC

AGILENT E3631A

POWER SUPPLY

5.000

0.350A

COM

6V

±25V

+

–

+ –

AGILENT E3631A

POWER SUPPLY

0.500

0.010A

COM

VCM = 0.5V

6V

±25V

+

–

+ –

R AND S FSEA 30

SPECTRUM ANALYZER

100MHz TO 4GHz

+6dBm

RF

IN

TEKTRONIX AFG3252

DUAL FUNCTION

ARBITRARY FUNCTION GENERATOR

1MHz

AMPL 700mV p-p

PHASE 0°

1MHz

AMPL 700mV p-p

PHASE 90°

CH1

CH2

RF

OUT

R AND S SMT 06

SIGNAL GENERATOR

FREQ 4MHz TO 4GHz

LEVEL 0dBm

IN1

IN1

TSEN

GND

VPOSB VPOSA

IP

IN

IP

IN

QP

QN

LO

OUT

OUTPUT

GND

VPOS

+5V

VPOS +5V

–5V

FMOD

CHAR BD

Figure 42. Setup for Baseband Frequency Sweep and Undesired Sideband Nulling

The setup used to evaluate baseband frequency sweep and

undesired sideband nulling of the ADL5372 is shown in Figure 42.

The interface board has circuitry that converts the single-ended

I input and Q input from the arbitrary function generator to

differential I and Q baseband signals with a dc bias of 500 mV.

Undesired sideband nulling was achieved through an iterative

process of adjusting amplitude and phase on the Q-channel. See

Sideband Suppression Optimization section for a detailed

discussion on sideband nulling.