APW7136ACITRG datasheet(12/17 Pages) ANPEC

12 / 17 page

Rev. A.4 - Dec., 2010

APW7136A/B/C

www.anpec.com.tw

Application Information (Cont.)

Output Capacitor Selection (Cont.)

For ceramic capacitor application, the output voltage ripple

is dominated by the

∆V

COUT. W hen choosing the input and

output ceramic capacitors, the X5R or X7R with their

good temperature and voltage characteristics are

recommended.

Diode Selection

To achieve the high efficiency, a Schottky diode must be

used. The current rating of the diode must meet the peak

current rating of the converter.

Setting the LED Current

In figure 1, the converter regulates the voltage on FB pin,

connected with the cathod of the lowest LED and the cur-

rent-sense resistor R1, at 0.25V (typical). Therefore, the

current (I

LED), flowing via the LEDs and the R1, is calcu-

lated by the following equation:

LED = 0.25V/R1

Recommended Inductor Selection

Designator Manufacturer

Part Number

Inductance (µH)

Max DCR (ohm)

Saturation

Current (A)

Dimensions

L x W x H (mm

GOTREND

GTSD32

0.592

0.52

3.85 x 3.85 x 1.8

Recommended Capacitor Selection

Designator Manufacturer

Part Number

Capacitance (µF)

TC Code

Rated Voltage (V)

Case Size

Murata

GRM188R60J475KE19

4.7

X5R

6.3

0603

Murata

GRM21BR71H105KA12

1.0

X7R

0805

Recommended Diode Selection

Designator Manufacturer

Part Number

Maximum Average Forward

Rectified Current (A)

Maximum Repetitive Peak

Reverse Voltage (V)

Case Size

Zowie

MSCD106

1.0

0805

Zowie

MSCD104

1.0

0805

Layout Consideration

For all switching power supplies, the layout is an impor-

tant step in the design; especially at high peak currents

and switching frequencies. If the layout is not carefully

done, the regulator might show noise problems and duty

cycle jitter.

1. The input capacitor should be placed close to the VIN

and the GND. Connecting the capacitor with VIN and

GND pins by short and wide tracks without using any

vias for filtering and minimizing the input voltage ripple.

2. The inductor should be placed as close as possible to

the LX pin to minimize length of the copper tracks as

well as the noise coupling into other circuits.

3. Since the feedback pin and network is a high imped-

ance circuit, the feedback network should be routed

away from the inductor. The feedback pin and feed-

back network should be shielded with a ground plane

or track to minimize noise coupling into this circuit.

4. A star ground connection or ground plane minimizes

ground shifts and noise is recommended.

To Anode of

WLEDs

From Cathod

of WLEDs

Via To OVP

Via To GND

Via To V

OUT

ADJ

Refer to Figure. 3

Optimized APW7136 Layout

OUT

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