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AD5280 数据表(PDF) 19 Page - Analog Devices |
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AD5280 数据表(HTML) 19 Page - Analog Devices |
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19 / 28 page ![]() AD5280/AD5282 Rev. C | Page 19 of 28 LAYOUT AND POWER SUPPLY BYPASSING It is a good practice to design a layout with compact, minimum lead lengths. The leads to the input should be as direct as possible with a minimum conductor length. Ground paths should have low resistance and low inductance. AD5280/ AD5282 VDD VSS VDD VSS GND C3 10µF C1 0.1µF C4 10µF C2 0.1µF + + Similarly, it is also a good practice to bypass the power supplies with quality capacitors for optimum stability. Supply leads to the device should be bypassed with 0.01 μF to 0.1 μF disc or chip ceramic capacitors. Low ESR 1 μF to 10 μF tantalum or electrolytic capacitors should also be applied at the supplies to minimize any transient disturbance and filter low frequency ripple (see Figure 54). Notice that the digital ground should also be joined remotely to the analog ground at one point to minimize digital ground bounce. Figure 54. Power Supply Bypassing |
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