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AD8007AKS-R2 数据表(PDF) 17 Page - Analog Devices |
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AD8007AKS-R2 数据表(HTML) 17 Page - Analog Devices |
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17 / 21 page ![]() AD8007/AD8008 Rev. E | Page 16 of 20 Whenever physical layout considerations prevent the decoupling scheme shown in Figure 53, the user can connect one of the high frequency decoupling capacitors directly across the supplies and connect the other high frequency decoupling capacitor to ground (see Figure 54). +VS –VS RG 499Ω RS 200Ω IN RF 499Ω OUT AD8007 + + 10µF 10µF C1 0.1µF C2 0.1µF Figure 54. High Frequency Capacitors Connected Across the Supplies (Recommended) LAYOUT CONSIDERATIONS The standard noninverting configuration with recommended power supply bypassing is shown in Figure 54. The 0.1 μF high frequency decoupling capacitors should be X7R or NPO chip components. Connect C2 from the +VS pin to the −VS pin. Connect C1 from the +VS pin to signal ground. The length of the high frequency bypass capacitor leads is critical. Parasitic inductance due to long leads works against the low impedance created by the bypass capacitor. The ground for the load impedance should be at the same physical location as the bypass capacitor grounds. For larger value capacitors, which are intended to be effective at lower frequencies, the current return path distance is less critical. |
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