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ALD1726PA 数据表(PDF) 5 Page - Advanced Linear Devices |
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ALD1726PA 数据表(HTML) 5 Page - Advanced Linear Devices |
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5 / 10 page ![]() ALD1726E/ALD1726 Advanced Linear Devices 5 TA = 25 oC VS = ±1.0V unless otherwise specified 1726E 1726 Parameter Symbol Min Typ Max Min Typ Max Unit Test Conditions Initial Power Supply PSRR i 70 70 dB RS ≤ 1MΩ Rejection Ratio 8 Initial Common Mode CMRRi 70 70 dB RS ≤ 1MΩ Rejection Ratio 8 Large Signal Voltage Gain AV 50 50 V/mV RL = 1MΩ Output Voltage Range VO low -0.95 -0.9 -0.95 -0.90 V RL = 1MΩ VO high 0.9 0.95 0.90 0.95 Bandwidth BW 0.3 0.3 MHz Slew Rate SR 0.17 0.17 V/ µsAV = +1, CL = 50pF VS = ±2.5V -55°C ≤ TA ≤ +125°C unless otherwise specified 1726E 1726 Parameter Symbol Min Typ Max Min Typ Max Unit Test Conditions Initial Input offset Voltage VOS i 0.7 0.7 mV RS ≤ 100KΩ Input Offset Current IOS 2.0 2.0 nA Input Bias Current IB 2.0 2.0 nA Initial Power Supply PSRR i 75 75 dB RS ≤ 1MΩ Rejection Ratio 8 Initial Common Mode CMRR i 83 83 dB RS ≤ 1MΩ RejectionRatio 8 Large Signal Voltage Gain AV 15 50 15 50 V/mV RL = 1MΩ Output Voltage Range VO low -2.40 -2.30 -2.40 -2.30 V VO high 2.30 2.40 2.30 2.40 V RL = 1MΩ |
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