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AD5245BRJ5-R2 数据表(PDF) 7 Page - Analog Devices |
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AD5245BRJ5-R2 数据表(HTML) 7 Page - Analog Devices |
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7 / 20 page ![]() AD5245 Rev. B | Page 7 of 20 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS A B AD0 SDA 1 2 3 4 5 8 7 6 W VDD GND SCL AD5245 TOP VIEW (Not to Scale) Figure 3. Pin Configuration Table 5. Pin Function Descriptions Pin No. Mnemonic Description 1 W W Terminal. GND ≤ VW ≤ VDD. 2 VDD Positive Power Supply. 3 GND Digital Ground. 4 SCL Serial Clock Input. Positive edge triggered. Pull-up resistor required. 5 SDA Serial Data Input/Output. Pull-up resistor required. 6 AD0 Programmable Address Bit 0 for Two-Device Decoding. 7 B B Terminal. GND ≤ VB ≤ VDD. 8 A A Terminal. GND ≤ VA ≤ VDD. |
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