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ADS7828 数据表(PDF) 13 Page - Texas Instruments

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部件名 ADS7828
功能描述  12-Bit, 8-Channel Sampling ANALOG-TO-DIGITAL CONVERTER with I2C Interface
PDF  22 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

ADS7828 数据表(HTML) 13 Page - Texas Instruments

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ADS7828
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SBAS181C
www.ti.com
FIGURE 4. Typical Read Sequence in HS Mode.
READING IN HS MODE
High Speed (HS) mode is fast enough that codes can be
read out one at a time. In HS mode, there is not enough time
for a single conversion to complete between the reception of
a repeated START condition and the read-addressing byte,
so the ADS7828 stretches the clock after the read-address-
ing byte has been fully received, holding it LOW until the
conversion is complete.
See Figure 4 for a typical read sequence for HS mode.
Included in the read sequence is the shift from F/S to HS
modes. It may be desirable to remain in HS mode after
reading a conversion; to do this, issue a repeated START
instead of a STOP at the end of the read sequence, since a
STOP causes the part to return to F/S mode.
Sr
A1
10
010
A0
RA
SX
00
001
X
X
N
Sr
A1
10
010
A0
W
ASD
C2 C1 C0 PD1 PD0 XXA
000
0
D11 D10 D9 D8
AD7 D6 . . .D1 D0
NP
F/S Mode
HS Mode Master Code
HS Mode Enabled
HS Mode Enabled
ADC Power-Down Mode
ADC Sampling Mode
ADC Converting Mode
Command Byte
Write-Addressing Byte
Read-Addressing Byte
HS Mode Enabled
Return to F/S Mode(1)
ADC Power-Down Mode
(depending on power-down selection bits)
2 x (8 Bits + ack/not-ack)
From Master to Slave
A = acknowledge (SDA LOW)
N = not acknowledge (SDA HIGH)
S = START Condition
P = STOP Condition
Sr = repeated START condition
W = '0' (WRITE)
R = '1' (READ)
From Slave to Master
NOTES: (1) To remain in HS mode, use repeated START instead of STOP.
(2) SCLH is SCL in HS mode.
SCLH(2) is stretched LOW waiting for data conversion



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