A6A259KA datasheet(4/10 Pages) ALLEGRO

4 / 10 page

6A259

8-BIT ADDRESSABLE

DMOS POWER DRIVER

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000

Limits

Characteristic

Symbol

Test Conditions

Min.

Typ.

Max.

Units

Logic Supply Voltage

VDD

Operating

4.5

5.0

5.5

Output Breakdown

V(BR)DSX

IO = 1 mA

—

Voltage

Off-State Output

IDSX

VO = 40 V

—

0.1

1.0

µA

Current

VO = 40 V, TA = 125°C—

0.2

5.0

µA

Static Drain-Source

rDS(on)

IO = 350 mA

—

1.0

1.5

Ω

On-State Resistance

IO = 350 mA, TA = 125°C—

1.7

2.5

Ω

Source-to-Drain

VSD

IF = 350 mA

—

1.0

—

Diode Voltage

Nominal Output

IO(nom)

VDS(on) = 0.5 V, TA = 85

°C

—

350

—

Current

Output Current

IO(chop)

IO at which chopping starts, TC = 25

°C

0.6

0.8

1.1

Logic Input Current

IIH

VI = VDD = 5.5 V

—

1.0

µA

IIL

VI = 0, VDD = 5.5 V

—

-1.0

µA

Prop. Delay Time

tPLH

IO = 350 mA, CL = 30 pF

—

100

—

tPHL

IO = 350 mA, CL = 30 pF

—

Output Rise Time

IO = 350 mA, CL = 30 pF

—

Output Fall Time

IO = 350 mA, CL = 30 pF

—

Supply Current

IDD(off)

VDD = 5.5 V, Outputs OFF

—

100

µA

IDD(on)

VDD = 5.5 V, Outputs ON

—

150

300

µA

Typical Data is at VDD = 5 V and is for design information only.

NOTE — Pulse test, duration

≤ 100 µs, duty cycle ≤ 2%.

ELECTRICAL CHARACTERISTICS at TA = +25

°C, V

DD = 5 V, tir = tif

≤ 10 ns (unless otherwise

specified).

RECOMMENDED OPERATING CONDITIONS

over operating temperature range

Logic Supply Voltage Range, VDD ............... 4.5 V to 5.5 V

High-Level Input Voltage, VIH ............................ ≥ 0.85VDD

Low-level input voltage, VIL ................................. ≤0.15VDD

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