MP2452―1A, 36V, 1MHz, STEP-DOWN CONVERTER

MP2452 Rev. 1.0

www.MonolithicPower.com

9

9/27/2010

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The MP2452 is a 1MHz, non-synchronous, step-

down switching regulator with integrated internal

high-side high voltage power MOSFET. It

provides internally compensated single 1A output

with current mode control. It features wide input

voltage range, internal soft-start control, and

precision current limit. Its very low operational

quiescent current suits it for battery powered

applications.

PWM Control

At moderate to high output current, the MP2452

operates in a fixed frequency, peak current

control mode to regulate the output voltage. A

PWM cycle is initiated by the internal clock. The

power MOSFET is turned on and remains on

until its current reaches the value set by COMP

voltage. When the power switch is off, it remains

off for at least 100ns before the next cycle starts

If, in one PWM period, the current in the power

MOSFET does not reach COMP set current

value, the power MOSFET remains on, saving a

turn-off operation.

Pulse Skipping Mode

At light load condition, the MP2452 goes into

pulse skipping mode to improve light load

efficiency. Pulse skipping decision is based on its

internal COMP voltage. If COMP is lower than

the internal sleep threshold, a PAUSE command

is generated to block the turn-on clock pulse so

the power MOSFET is not commanded ON

subsequently, saving gate driving and switching

losses. This PAUSE command also puts the

whole chip into sleep mode, consuming very low

quiescent current to further improve the light load

efficiency.

When COMP voltage is higher than the sleep

threshold, the PAUSE signal is reset so the chip

is back into normal PWM operation. Every time

when the PAUSE changes states from low to

high, a turn-on signal is generated right away,

turning on the power MOSFET.

Error Amplifier

The Error amplifier is composed of an internal

OP-AMP

with

an

R-C

feedback

network

connected between its output node (internal

COMP node) and its negative input node (FB).

When FB is lower than its internal reference

voltage (REF), the COMP output is then driven

higher by the OP-AMP, causing higher switch

peak current output hence more energy delivered

to the output. Vise versus.

When connecting to the FB pin, normally there is

to control the gain of the error amplifier along

with the internal compensation R-C network.

Internal Regulator

Most of the internal circuitries are powered on by

the 2.6V internal regulator. This regulator takes

VIN input and operates in the full VIN range.

When VIN is greater than 3.0V, the output of the

regulator is in full regulation. When VIN is lower,

the output degrades.

Enable Control

The MP2452 has a dedicated enable control pin

EN. When VIN>UVLO, the chip can be enabled

and disabled by EN pin. This is a HIGH effective

logic. Its trailing threshold is a consistent 1.2V. Its

rising threshold is about 300mV higher. When

floating, EN pin is internally pulled down to GND

so the chip is disabled.

When EN is pulled down to 0V, the chip is put

into the lowest shutdown current mode. When

EN is higher than zero but lower than its rising

threshold, the chip is still in shutdown mode but

the shutdown current increases slightly.

Under Voltage Lockout (UVLO)

VIN

Under

voltage

lockout

(UVLO)

is

implemented to protect the chip from operating at

insufficient supply voltage. The UVLO rising

threshold is about 3.0V while its trailing threshold

is a consistent 2.6V.

Internal Soft-start

Reference type soft-start is implemented to

prevent the converter output voltage from

overshooting during startup. When the chip starts,

the internal circuitry generates a soft-start voltage

(SS) ramping up from 0V at a slow pace set by

the soft-start time. When it is lower than the

internal reference REF, SS overrides the REF so

the error amplifier uses SS instead of REF as the

reference. When SS is higher than REF, REF

gains the control back.