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STF8N80K5 数据表(PDF) 5 Page - STMicroelectronics |
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STF8N80K5 数据表(HTML) 5 Page - STMicroelectronics |
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5 / 15 page ![]() DocID024419 Rev 2 5/15 STF8N80K5, STFI8N80K5 Electrical characteristics The built-in back-to-back Zener diodes have been specifically designed to enhance not only the device’s ESD capability, but also to make them capable of safely absorbing any voltage transients that may occasionally be applied from gate to source. In this respect, the Zener voltage is appropriate to achieve efficient and cost-effective protection of device integrity. The integrated Zener diodes thus eliminate the need for external components. Table 6. Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit t d(on) Turn-on delay time V DD = 400 V, I D = 3 A, R G =4.7 Ω, V GS =10 V (see Figure 18) -12- ns t r Rise time 14 - ns t d(off) Turn-off delay time 32 - ns t f Fall time 20 - ns Table 7. Source drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit I SD Source-drain current - 6 A I SDM Source-drain current (pulsed) 24 A V SD (1) 1. Pulsed: pulse duration = 300μs, duty cycle 1.5% Forward on voltage I SD = 6 A, V GS =0 - 1.5 V t rr Reverse recovery time I SD = 6 A, V DD = 60 V di/dt = 100 A/μs, (see Figure 17) - 300 ns Q rr Reverse recovery charge 3 μC I RRM Reverse recovery current 20 A t rr Reverse recovery time I SD = 6 A, V DD = 60 V di/dt=100 A/μs, Tj=150 °C (see Figure 17) - 415 ns Q rr Reverse recovery charge - 3.8 μC I RRM Reverse recovery current - 18 A Table 8. Gate-source Zener diode Symbol Parameter Test conditions Min Typ. Max. Unit V (BR)GSO Gate-source breakdown voltage I GS = ± 1mA, I D =0 30 - - V |
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