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MP3394SGS 数据表(PDF) 12 Page - Monolithic Power Systems |
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MP3394SGS 数据表(HTML) 12 Page - Monolithic Power Systems |
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12 / 17 page ![]() MP3394S—4-STRING, MAX 200mA/STRING WHITE LED DRIVER MP3394S Rev. 1.03 www.MonolithicPower.com 12 3/21/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 4. Gate source charge QGS and gate drain charge QGD 5. Total gate charge, QG Ideally, the off-state voltage across the MOSFET is equal to the output voltage. Considering the voltage spike when it turns off, VDS(MAX) should be greater than 1.5 times of the output voltage. The maximum current through the power MOSFET occurs at the maximum input voltage and the maximum output power. The maximum RMS current through the MOSFET is given by RMS(MAX) IN(MAX) MAX II D =× , where: OUT IN(MIN) MAX OUT VV D V − ≈ The current rating of the MOSFET should be greater than 1.5xIRMS The ON resistance of the MOSFET determines the conduction loss, which is given by: k R I P (on) DS 2 RMS cond × × = Where k is the temperature coefficient of the MOSFET. The switching loss is related to QGD and QGS1 which determine the commutation time. QGS1 is the charge between the threshold voltage and the plateau voltage when a driver charges the gate, which can be read in the chart of VGS vs. QG of the MOSFET datasheet. QGD is the charge during the plateau voltage. These two parameters are needed to estimate the turn-on and turn-off losses. GS1 G SW DS IN SW DR TH GD G DS IN SW DR PLT QR PV I f VV QR VI f VV × =× × × + − × ×× × − Where VTH is the threshold voltage, VPLT is the plateau voltage, RG is the gate resistance, and VDS is the drain-source voltage. Please note that calculating the switching loss is the most difficult part in the loss estimation. The formula above provides a simplified equation. For more accurate estimates, the equation becomes much more complex. The total gate charge, QG, is used to calculate the gate drive loss. The expression is SW DR G DR f V Q P × × = Where VDR is the drive voltage. Selecting the Output Capacitor The output capacitor keeps the output voltage ripple small and ensures feedback loop stability. The output capacitor impedance must be low at the switching frequency. Ceramic capacitors with X7R dielectrics are recommended for their low ESR characteristics. For most applications, a 4.7μF ceramic capacitor in parallel with a 22μF electrolytic capacitor will suffice. Setting the Over Voltage Protection The open string protection is achieved through the detection of the voltage on the OVP pin. In some cases, an LED string failure results in the feedback voltage always zero. The part then keeps boosting the output voltage higher and higher. If the output voltage reaches the programmed OVP threshold, the protection will be triggered. To ensure the chip functions properly, select the resistor values for the OVP resistor divider to provide an appropriate set voltage. The recommended OVP point is about 1.1 to 1.2 times higher than the output voltage for normal operation. HIGH OVP LOW R V1.23 (1 ) R =× + Selecting Dimming Control Mode The MP3394S provides two different dimming methods 1. Direct PWM Dimming An external PWM dimming signal is employed to achieve PWM dimming control. Connect a 100kΩ resistor from BOSC pin to GND and apply a PWM dimming signal—in the range of 100Hz to 20kHz—to the DBRT pin. The minimum recommended amplitude of the PWM signal is 1.2V. The low level should be less than 0.4V (See Figure 4). |
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