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MP7748DF 数据表(PDF) 11 Page - Monolithic Power Systems |
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MP7748DF 数据表(HTML) 11 Page - Monolithic Power Systems |
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11 / 19 page ![]() MP7748 – 2X20W STEREO SINGLE ENDED CLASS D AUDIO AMPLIFIER MP7748 Rev. 1.0 www.MonolithicPower.com 11 1/28/2011 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. OPERATION The MP7748 is a Class D Audio Amplifier for driving stereo speakers in single-ended configuration or a mono speaker in bridge-tied- load configuration. It uses the Monolithic Power Systems patented Analog Adaptive ModulationTM to convert the audio input signal into pulses. These pulses drive an internal high- current output stage and, when filtered through an external inductor-capacitor filter, reproduce the input signal across the load. Because of the switching Class D output stage, power dissipation in the amplifier is drastically reduced when compared to Class A, B or A/B amplifiers while maintaining high fidelity and low distortion. REF1/2 are the positive inputs of the two amplifiers. They are set to half the DC power supply input voltage (VDD/2) by the internal circuit. The input capacitor CIN couple the AC signal at the input. The amplifier voltage gain is set by the combination of the input resister RIN1/2 and the feedback resistor RFB1/2 and is calculated by the equation: IN FB R R AV − = The MP7748 includes four high-power MOSFETs wherein for each channel the output driver stage uses two 250mΩ N-channel MOSFETs to deliver the pulses to the LC output filter which in turn drives the load. To fully enhance the high-side MOSFET, the gate is driven to a voltage higher than the source by the bootstrap capacitor between SW and BS. While the output is driven low, the bootstrap capacitor is charged from VDD through an internal circuit on the MP7748. The gate of the high-side MOSFET is driven high from the voltage at BS, forcing the MOSFET gate to a voltage higher than VDD and allowing the MOSFET to fully turn on, reducing power loss in the amplifier. Pop Elimination The MP7748 integrates a source current function to charge the AC coupling capacitor COUT1/2 for the SE output configuration and CIN1/2 at the start up moment. The start up source current slew rate is adjustable by selecting different capacitance of timer capacitor CTIMER1/2. The larger the capacitance of the timer capacitor is, the smaller the start up current slew rate is. The recommended 2.2µF timer capacitor results in a start up current slew rate of approximately 20mA/350ms which would help to minimize the turn on pop. After driving EN pin low, output SW will be set to high impedance immediately which would help to eliminate the turn off pop. Short Circuit/Overload Protection The MP7748 has internal overload and short circuit protection. The currents in both the high- side and low-side MOSFETs are measured and if the current exceeds the 4.5A short circuit current limit, both MOSFETs are turned off. The MP7748 then restarts with the same power up sequence that is used for normal starting to prevent a pop from occurring after a short circuit condition is removed. Enable Function The MP7748 EN input is an active high enable control. To enable the MP7748, drive EN with a 2.0V or higher voltage. To disable the amplifier, drive it below 0.4V. While the MP7748 is disabled, the VDD operating current is less than 140µA and the output driver MOSFETs are turned off. Programmable UVP MP7748 integrate programmable UVP function, which can be used to shutdown the MP7748 to escape the pop, by controlling the UVP node voltage. The corresponding circuit is shown in the followed figure 2. If the UVP pin is NC, the default VDD shutdown voltage (rising threshold) is 8.4V since there is internal voltage divided circuit. The VDD shutdown voltage can be flexibly adjusted by controlling UVP pin voltage The recommended VDD shutdown voltage is from 9.5V to power supply. As shown in the figure 2, if external resistor RH and RL is low enough (e.g. RH, RL < 50kΩ) compared with internal 500kΩ and 550kΩ resistor, the VDD shutdown voltage (rising threshold) can be calculated by the equation: |
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