12 www.microsemi.com/soc

Notes:

1 AES is not available for Cortex-M1 ProASIC3L devices.

2 For the A3PE3000L, the PQ208 package has six CCCs and two PLLs.

ProASIC3L

Balancinglowpower,performanceandlowcost

ProASIC3L FPGAs feature 40 percent lower dynamic power and 90 percent lower static power than the previous generation ProASIC3 FPGAs and orders of

magnitude lower power than SRAM competitors, combining dramatically reduced power consumption with up to 350 MHz operation. The ProASIC3L family also

supports the free implementation of an FPGA-optimized 32-bit ARM Cortex-M1 processor, enabling system designers to select Microsemi’s flash FPGA solution

that best meets their speed and power design requirements, regardless of application or volume. Optimized software tools using power-driven layout (PDL)

provide instant power reduction capabilities.

I/Os Per Package

ProASIC3L Low Power Devices

ProASIC3L Devices

A3P250L

A3P600L

A3P1000L

A3PE3000L

Cortex-M1Devices

M1A3P600L

M1A3P1000L

M1A3PE3000L

System Gates

250,000

600,000

1,000,000

3,000,000

VersaTiles(D-flip-flops)

6,144

13,824

24,576

75,264

RAM(1,024bits)

36

108

144

504

4,608-BitBlocks

8

24

32

112

FlashROMKbits(1,024bits)

1

1

1

1

Yes

Yes

Yes

Yes

1

1

1

6

VersaNetGlobals

18

18

18

18

I/OBanks

4

4

4

8

Maximum User I/Os

(packaged device

157

235

300

620

Package Pins

VQ

PQ

FG

VQ100

PQ208

FG144, FG256

PQ208

FG144, FG256, FG484

PQ208

FG144, FG256, FG484

PQ208

FG324, FG484, FG896

ProASIC3L Devices

A3P250L

A3P600L

A3P1000L

A3PE3000L

Cortex-M1Devices

M1A3P600L

M1A3P1000L

M1A3PE3000L

I/O Type

Single-

Ended I/O

Differential

I/O Pairs

Single-

Ended I/O

Differential

I/O Pairs

Single-

Ended I/O

Differential

I/O Pairs

Single-

Ended I/O

Differential

I/O Pairs

VQ100

68

13

—

—

—

—

—

—

PQ208

151

34

154

35

154

35

147

65

FG144

97

24

97

25

97

25

—

—

FG256

157

38

177

43

177

44

—

—

FG324

—

—

—

—

—

—

221

110

FG484

—

—

235

60

300

74

341

168

FG896

—

—

—

—

—

—

620

310

• Lowpower1.2Vto1.5V

core operation

• 700MbpsDDR,LVDS

capable I/Os

• Upto350MHz

systemperformance

• EnhancedI/Ofeatures

• EmbeddedSRAMandNVM

• Configurationmemoryerror

immune

• ISPandsecurity

• Flash*Freezetechnology

forlowestpower

• Reprogrammable

flashtechnology

• CCCsandPLLs