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AP2152 数据表(PDF) 4 Page - Diodes Incorporated

部件名 AP2152
功能描述  0.5A DUAL CHANNEL CURRENT-LIMITED POWER SWITCH
PDF  17 Pages
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制造商  DIODES [Diodes Incorporated]
网页  http://www.diodes.com
标志 DIODES - Diodes Incorporated

AP2152 数据表(HTML) 4 Page - Diodes Incorporated

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AP2142/ AP2152
Document number: DS31571 Rev. 6 - 2
4 of 17
www.diodes.com
January 2013
© Diodes Incorporated
AP2142/ AP2152
Electrical Characteristics (@TA = +25°C, VIN = +5V, unless otherwise specified.)
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
VUVLO
Input UVLO
RLOAD = 1kΩ
1.6
1.9
2.5
V
ISHDN
Input Shutdown Current
Disabled, IOUT = 0
0.5
1
µA
IQ
Input Quiescent Current, Dual
Enabled, IOUT = 0
100
160
µA
ILEAK
Input Leakage Current
Disabled, OUT grounded
1
µA
IREV
Reverse Leakage Current
Disabled, VIN = 0V, VOUT = 5V, IREV at VIN
1
µA
RDS(ON)
Switch on-resistance
VIN = 5V, IOUT = 0.5A, -40°C ≤ TA ≤ +85°C
MSOP-8EP
115
150
mΩ
SO-8
120
160
mΩ
VIN = 3.3V, IOUT = 0.5A, -40°C ≤ TA ≤ 85°C
140
180
mΩ
ISHORT
Short-circuit current limit
Enabled into short circuit, CL = 68µF
0.6
A
ILIMIT
Over-Load Current Limit
VIN = 5V, VOUT = 4.8V, CL = 68µF, -40°C ≤ TA ≤ +85°C
0.6
0.8
1.0
A
ITrig
Current limiting trigger threshold
VIN = VEN, Output Current Slew rate (<100A/WS), CL = 68µF
1.0
A
VIL
EN Input Logic Low Voltage
VIN = 2.7V to 5.5V
0.8
V
VIH
EN Input Logic High Voltage
VIN = 2.7V to 5.5V
2
V
ISINK
EN Input leakage
VEN = 5V
1
µA
TD(ON)
Output turn-on delay time
CL=1µF, RLOAD = 10Ω
0.05
ms
TR
Output turn-on rise time
CL=1µF, RLOAD = 10Ω
0.6
1.5
ms
TD(OFF)
Output turn-off delay time
CL=1µF, RLOAD = 10Ω
0.01
ms
TF
Output turn-off fall time
CL=1µF, RLOAD = 10Ω
0.05
0.1
ms
RFLG
FLG output FET on-resistance
IFLG =10mA
30
50
Ω
TBlank
FLG blanking time
CIN =10µF, CL = 68µF
4
7
15
ms
TSHDN
Thermal shutdown threshold
Enabled, RLOAD = 1kΩ
140
°C
THYS
Thermal shutdown hysteresis
25
°C
θJA
Thermal Resistance Junction-to-Ambient
SO-8 (Note 5)
110
oC/W
MSOP-8EP (Note 6)
60
oC/W
Notes:
5. Test condition for SO-8: Device mounted on FR-4 2-layer board, 2oz copper, with minimum recommended pad layout.
6. Test condition for MSOP-8EP: Device mounted on FR-4 2-layer board, 2oz copper, with minimum recommended pad on top layer and 3 vias to bottom
layer ground plane.



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