2

Am27C040

FI NAL

PRODUCT SELECTOR GUIDE

CONNECTION DIAGRAMS

Top View

DIP

PLCC

Notes:

1. JEDEC nomenclature is in parenthesis.

2. The 32-pin DIP to 32-pin PLCC configuration varies from the JEDEC 28-pin DIP to 32-pin PLCC configuration.

PIN DESIGNATIONS

A0–A18

=

Address Inputs

CE# (E#)/PGM# (P#)=

Chip Enable/Program Enable Input

DQ0–DQ7

=

Data Inputs/Outputs

OE# (G#)

=

Output Enable Input

=

Program Voltage Input

=

GroundLogic Symbol

LOGIC SYMBOL

Family Part Number

Am27C040

-90

-120

-150

-200

Max Access Time (ns)

90

120

150

200

CE# (E#) Access (ns)

90

120

150

200

OE# (G#) Access (ns)

40

50

65

75

3

4

5

2

1

9

10

11

12

13

27

26

25

24

23

7

8

22

21

6

32

31

20

14

30

29

28

15

16

19

18

17

A6

A5

A4

A3

A2

A1

A0

A16

DQ0

A15

A12

A7

DQ1

DQ2

A8

A9

A11

OE# (G#)

A10

CE# (E#)/PGM# (P#)

DQ7

A18

DQ6

A17

A14

A13

DQ5

DQ4

DQ3

14971G-2

5

6

7

8

9

10

11

12

13

17 18 19 20

16

15

14

29

28

27

26

25

24

23

22

21

A7

A6

A5

A4

A3

A2

A1

A0

DQ0

1

31 30

2

3

432

A14

A13

A8

A9

A11

OE# (G#)

A10

CE# (E#)/PGM# (P#)

DQ7

14971G-3

19

8

DQ0–DQ7

A0–A18

OE# (G#)

14971E-4

CE# (E#)/PGM#(P#)