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AM29DL800B 数据表(PDF) 12 Page - Advanced Micro Devices |
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AM29DL800B 数据表(HTML) 12 Page - Advanced Micro Devices |
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12 / 43 page ![]() 12 Am29DL800B P R E L I M I NARY Table 3. Am29DL800BB Bottom Boot Sector Architecture Note: The address range is A18:A-1 if in byte mode (BYTE# = VIL). The address range is A18:A0 if in word mode (BYTE# = VIH). Autoselect Mode The autoselect mode provides manufacturer and de- vice identification, and sector protection verification, through identifier codes output on DQ7–DQ0. This mode is primarily intended for programming equipment to automatically match a device to be programmed with its corresponding programming algorithm. However, the autoselect codes can also be accessed in-system through the command register. When using programming equipment, the autoselect mode requires VID (11.5 V to 12.5 V) on address pin A9. Address pins A6, A1, and A0 must be as shown in Table 4. In addition, when verifying sector protection, the sector address must appear on the appropriate highest order address bits (see Tables 2 and 3). Table 4 shows the remaining address bits that are don’t care. When all necessary bits have been set as required, the programming equipment may then read the corre- sponding identifier code on DQ7-DQ0. To access the autoselect codes in-system, the host system can issue the autoselect command via the command register, as shown in Table 5. This method does not require VID. Refer to the Autoselect Command Sequence section for more information. Bank Sector Sector Address Sector Size (Kbytes/ Kwords) (x8) Address Range (x16) Address Range Bank Address A15 A14 A13 A12 A18 A17 A16 Bank 2 SA21 11 11 X X X 64/32 F0000h–FFFFFh 78000h–7FFFFh SA20 1 1 1 0 X X X 64/32 E0000h–EFFFFh 70000h–77FFFh SA19 1 1 0 1 X X X 64/32 D0000h–DFFFFh 68000h–6FFFFh SA18 1 1 0 0 X X X 64/32 C0000h–CFFFFh 60000h–67FFFh SA17 1 0 1 1 X X X 64/32 B0000h–BFFFFh 58000h–5FFFFh SA16 1 0 1 0 X X X 64/32 A0000h–AFFFFh 50000h–57FFFh SA15 1 0 0 1 X X X 64/32 90000h–9FFFFh 48000h–4FFFFh SA14 1 0 0 0 X X X 64/32 80000h–8FFFFh 40000h–47FFFh SA13 0 1 1 1 X X X 64/32 70000h–7FFFFh 38000h–3FFFFh SA12 0 1 1 0 X X X 64/32 60000h–6FFFFh 30000h–37FFFh SA11 0 1 0 1 X X X 64/32 50000h–5FFFFh 28000h–2FFFFh SA10 0 1 0 0 X X X 64/32 40000h–4FFFFh 20000h–27FFFh SA9 0 0 1 1 X X X 64/32 30000h–3FFFFh 18000h–1FFFFh SA8 0 0 1 0 X X X 64/32 20000h–2FFFFh 10000h–17FFFh Bank 1 SA7 0 0 0 1 1 1 X 16/8 1C000h–1FFFFh 0E000h–0FFFFh SA6 0 0 0 1 10 X 32/16 18000h–1BFFFh 14000h–17FFFh 0C000h–0DFFFh 0A000h–0BFFFh 01 X SA5 0 0 0 1 0 0 1 8/4 12000h–13FFFh 09000h–09FFFh SA4 0 0 0 1 0 0 0 8/4 10000h–11FFFh 08000h–08FFFh SA3 0 0 0 0 1 1 1 8/4 0E000h–0FFFFh 07000h–07FFFh SA2 0 0 0 0 1 1 0 8/4 0C000h–0DFFFh 06000h–06FFFh SA1 0 0 0 0 10 X 32/16 08000h–0BFFFh, 04000h–07FFFh 04000h–05FFFh, 02000h–03FFFh, 01 X SA0 0 0 0 0 0 0 X 16/8 00000h–03FFFh 00000h–01FFFh |
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