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AM7992BPC 数据表(PDF) 5 Page - Advanced Micro Devices |
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AM7992BPC 数据表(HTML) 5 Page - Advanced Micro Devices |
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5 / 27 page ![]() Am7992B 5 X 1, X2 Biased Crystal Oscillator (Input) X 1 is the input and X2 is the bypass port. When con- nected for crystal operation, the system clock that ap- pears at TCLK is half the frequency of the crystal oscillator. X 1 may be driven from an external source of two times the data rate. RF Frequency Setting Voltage-Controlled Oscillator (V CO) Loop Filter (Output) This loop filter output is a reference voltage for the re- ceive path phase detector. It also is a reference for tim- ing noise immunity circuits in the collision and receive enable path. Nominal reference V CO gain is 1.25 TCLK frequency MHz/V. PF Receive Path V CO Phase-Locked Loop Filter (Input) This loop filter input is the control for receive path loop damping. Frequency of the receive V CO is internally lim- ited to transmit frequency ±12%. Nominal receive V CO gain is 0.25 reference V CO gain MHz/V. TEST Test Control (Input) A static input that is connected to V CC for Am7992B/ Am7990 operation and to ground for testing of Receive ± path threshold and RCLK output HIGH parameters. When TEST is grounded, RX is enabled and RCLK is enabled except during clock acquisition, when RCLK is HIGH. GND1 High Current Ground GND2 Logic Ground GND3 Voltage-Controlled Oscillator Ground V CC1 High Current and Logic Supply V CC2 Voltage-Controlled Oscillator Supply |
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