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AM79C981JC 数据表(PDF) 23 Page - Advanced Micro Devices

部件名 AM79C981JC
功能描述  Integrated Multiport Repeater Plus??(IMR??
PDF  40 Pages
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制造商  AMD [Advanced Micro Devices]
网页  http://www.amd.com
标志 AMD - Advanced Micro Devices

AM79C981JC 数据表(HTML) 23 Page - Advanced Micro Devices

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AMD
PRELIMINARY
1–93
Am79C981
IMR+ Chip External Components
Figure 6 shows a typical twisted pair port external com-
ponents schematic. The resistors used should have a
1% tolerance to ensure interoperability with 10BASE-T
compliant networks. The filters and pulse transformers
are necessary devices that have a major influence on
the performance and compliance of the 10BASE-T ports
of the repeater. Specifically, the transmitted waveforms
are heavily influenced by the filter characteristics and
the twisted pair receivers employ several criteria to con-
tinuously monitor the incoming signal’s amplitude and
timing characteristics to determine when and if to assert
the internal carrier sense. For these reasons, it is crucial
that the values and tolerances of the external compo-
nents be as specified. Several manufacturers produce a
module that combines the functions of the transmit and
receive filters and the pulse transformers into one
package.
Notes:
1. Compatible filter modules, with a brief description of package type and features are included in the Appendix.
2. The resistor values are recommended for general purpose use and should allow compliance to the 10BASE-T specification
for template fit and jitter performance. However, the overall performance of the transmitter is also affected by the transmit
filter configuration.
17306B-12
1.21K
100
61.9
422
XMT
Filter
RCV
Filter
Filter &
Transformer
Module
Note 1
Note 2
TXP+
TXD–
TXP–
TXD+
RXD+
RXD–
61.9
422
RJ45
Connector
TD+
TD–
RD+
RD–
3
6
1
2
1:1
1:1
Am79C981
Figure 7a. Typical TP Port External Components
17306B-13
DO–
DI+
DI–
CI+
CI–
DO+
Pulse
Transformer
Note 1
40.2
Optional
ANLG GND
0.1
µF
0.1
µF
AUI
Connector
40.2
40.2
40.2
3
10
5
12
2
9
Am79C981
Notes:
1. Compatible AUI transformer modules, with a brief description of package type and features are included in the Appendix.
2. The differential input DI
± and the CI± pairs are externally terminated by two 40.2 Ω ±1% resistors and one optional common-
mode bypass capacitor. The differential input impedance, ZIDF, and the common-mode input impedance, ZICM, are speci-
fied so that the Ethernet specification for cable termination impedance is met using standard 1% resistor terminators. If SIP
devices are used, 39
Ω is the nearest usable equivalent value.
Figure 7b. Typical AUI Port Components



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