AM79C989JC datasheet(19/37 Pages) AMD

19 / 37 page

Am79C989

PRELIMINARY

Table 5.

Shared Registers

Port Registers

Nine physical registers in the QuEST device are allo-

cated per port. Six of the port registers relate to Auto-

Negotiation. The remaining port registers are used for

control.

Registers 0, 1, 4-7, and 18-20 require an exact match

to specify the port being addressed. A particular regis-

ter is addressed by sending the serial management

frame with the target address of the designated port.

The lower two bits of the PHYAD (bits A1 and A0) spec-

ify which port is selected.

Table 6.

Port Registers

Non-Implemented Registers

Non-implemented registers should neither be written to

or read. Reserved register bits within deﬁned registers

should be written with zeros. Reserved register bits

may return undeﬁned data and should be masked

by software.

Auto-Negotiation Control Register (Reg 0)

The Auto-Negotiation Control Register (Reg 0) con-

tains Read/Write (R/W), Read/Only (R/O), and Self-

Clearing (SC) bits. This register is duplicated for each

port.

Table 7.

Auto-Negotiation Control Register (Reg 0)

REGAD

2-3

Device ID

Interrupt Enable and Status

Summary Status

REGAD

Auto Negotiation Control

Auto Negotiation Status

Auto Negotiation Address

Auto Negotiation Link Partner

Auto Negotiation Expansion

Auto Negotiation Next Page

Control

Status

Error Mask

Bit(s)

Name

Description

Read/

Write

Default/

Reset

SRESET

1 = Resets the Auto Negotiation Control and Status registers to

their default state;

0 = Has no effect.

After reset is completed (approximately 10

µs), SRESET is cleared.

R/W, SC

Loopback

1 = Port will loop back the QTX_DATA to the QRX_DATA. Transmit

data will not be transmitted and receive data from the network will

be ignored.

0 = The port will receive and transmit normally.

R/W

Reserved

Written and read as zero.

R/O

ANEG_EN

1 = Auto-Negotiation enabled.

0 = Auto-Negotiation disabled.

R/W

PWR_DN

1 = 10BASE-T port Auto-Negotiation is reset. The Auto-Negotiation

process and Link Status State Machine will terminate. Link Test

Pulses will terminate.

0 = 10BASE-T port resumes normal operation.

R/W

Reserved

Written and read as zero.

R/O

Restart ANEG

1 = Auto-Negotiation restarts. The bit will be cleared when the Auto-

Negotiation process completes.

0 = Has no effect.

R/W, SC

AM79C989JC 数据表(PDF) 19 Page - Advanced Micro Devices

AM79C989JC 数据表(HTML) 19 Page - Advanced Micro Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37

数据表下载