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ADS5522IPAP 数据表(PDF) 17 Page - Texas Instruments

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部件名 ADS5522IPAP
功能描述  12-Bit, 80 MSPS Analog-To-Digital Converter
PDF  32 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

ADS5522IPAP 数据表(HTML) 17 Page - Texas Instruments

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Input Amplitude − dBFS
70
50
30
10
−10
−30
−100
−90
−60
0
−40
90
−20
−80 −70
−50
−30
−10
SNR(dBFS)
SNR(dBc)
SFDR(dBc)
fIN =150.1MHz
Input Amplitude − dBFS
70
50
30
10
−10
−30
−100
−90
−60
0
−40
90
−20
−80 −70
−50
−30
−10
SNR(dBFS)
SFDR(dBc)
SNR(dBc)
fIN =220.1MHz
Code
60
50
40
30
20
10
0
2052
2053
2054
2055
70
80
2056
2057
2058
2059
DifferentialClock Amplitude − V
85
80
75
70
65
60
0
0.5
1
3
1.5
90
SFDR
SNR
2
2.5
fIN =70.1MHz
f − Frequency − MHz
−40
−60
−80
−100
−120
−140
0
5
10
40
15
0
20
30
−20
25
fS =76.8MSPS
fIN =170MHz
35
ClockDutyCycle − %
85
80
75
70
65
60
30
40
50
60
90
SFDR
SNR
70
fIN =20.1MHz
ADS5522
SBAS320C – MAY 2004 – REVISED FEBRUARY 2007
TYPICAL CHARACTERISTICS (continued)
Typical values given at T
A = 25  C, AVDD = DRVDD = 3.3 V, sampling rate = 80 MSPS, 50% clock duty cycle, 3-Vpp
differential clock, and –1 dBFS differential input, unless otherwise noted
AC PERFORMANCE
AC PERFORMANCE
vs INPUT AMPLITUDE
vs INPUT AMPLITUDE
Figure 29.
Figure 30.
OUTPUT
AC PERFORMANCE
NOISE HISTOGRAM
vs CLOCK AMPLITUDE
Figure 31.
Figure 32.
WCDMA
AC PERFORMANCE
CARRIER
vs CLOCK DUTY CYCLE
Figure 33.
Figure 34.
17
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