A43L0616AV datasheet(39/45 Pages) AMICC

39 / 45 page

A43L0616A

(May, 2001, Version 1.0)

AMIC Technology, Inc.

Self Refresh Entry & Exit Cycle

* Note : TO ENTER SELF REFRESH MODE

CS, RAS & CAS with CKE should be low at the same clock cycle.

2. After 1 clock cycle, all the inputs including the system clock can be don’t care except for CKE.

3. The device remains in self refresh mode as long as CKE stays “Low”.

(cf.) Once the device enters self refresh mode, minimum tRAS is required before exit from self refresh.

TO EXIT SELF REFRESH MODE

4. System clock restart and be stable before returning CKE high.

CS starts from high.

6. Minimum tRC is required after CKE going high to complete self refresh exit.

7. 2K cycle of burst auto refresh is required before self refresh entry and after self refresh exit.

If the system uses burst refresh.

CLOCK

CKE

RAS

CAS

ADDR

: Don't care

A10/AP

Self Refresh Exit

Auto Refresh

DQM

Self Refresh Entry

tSS

* Note 4

* Note 1

* Note 3

* Note 2

tSS

* Note 6

tRC min.

* Note 5

* Note 7

Hi-Z

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