STM8S103F2P3TR datasheet(83/113 Pages) STMICROELECTRONICS

部件名	STM8S103F2P3TR

功能描述	Access line, 16 MHz STM8S 8-bit MCU, up to 8 Kbytes Flash, data EEPROM,10-bit ADC, 3 timers, UART, SPI, I²C

PDF	113 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

标志

83 / 113 page

Unit

Fast mode I

2C(1)

Standard mode I

Parameter

Symbol

Max

(2)

Min

(2)

Max

(2)

Min

(2)

0.6

4.0

STOP condition setup time

tsu(STO)

μs

1.3

4.7

STOP to START condition time

(bus free)

tw(STO:STA)

400

Capacitive load for each bus line

(1) f

MASTER, must be at least 8 MHz to achieve max fast I

2C speed (400kHz)

(2) Data based on standard I2C protocol requirement, not tested in production

(3) The maximum hold time of the start condition has only to be met if the interface does not stretch the

low time

(4) The device must internally provide a hold time of at least 300 ns for the SDA signal in order to bridge

the undefined region of the falling edge of SCL

Figure 42: Typical application with I

2C bus and timing diagram

tf(SDA)

tr(SDA)

tsu(SDA)

th(SDA)

tf(SCL)

tr(SCL)

tw(SCLL)

tw(SCLH)

th(STA)

tsu(STO)

tsu(STA)

tw(STO:STA)

SDA

SCL

4.7k

Ω

SDA

SCL

100

Ω

100

Ω

4.7k

Ω

I2C bus

START

STOP

REPEATED

START

STM8S

ai17490

1. Measurement points are made at CMOS levels: 0.3 x VDD and 0.7 x VDD.

10-bit ADC characteristics

10.3.10

Subject to general operating conditions for VDD, fMASTER, and TA unless otherwise specified.

83/113

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STM8S103F2P3TR 数据表(PDF) 83 Page - STMicroelectronics

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