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74LVC1G97GF 数据表(PDF) 8 Page - NXP Semiconductors |
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74LVC1G97GF 数据表(HTML) 8 Page - NXP Semiconductors |
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8 / 20 page ![]() 74LVC1G97 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 3 — 7 December 2011 8 of 20 NXP Semiconductors 74LVC1G97 Low-power configurable multiple function gate Table 10. Measurement points Supply voltage Input Output VCC VM VI VM 1.65 V to 1.95 V 0.5VCC VCC 0.5VCC 2.3 V to 2.7 V 0.5VCC VCC 0.5VCC 2.7 V 1.5 V 2.7 V 1.5 V 3.0Vto 3.6V 1.5V 2.7 V 1.5V 4.5 V to 5.5 V 0.5VCC VCC 0.5VCC Measurement points are given in Table 11. Definitions test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times. Fig 13. Test circuit for measuring switching times VEXT VCC VI VO mna616 DUT CL RT RL RL G Table 11. Measurement points Supply voltage Input Load VEXT VCC VI tr =tf CL RL tPLH, tPHL 1.65 V to 1.95 V VCC 2.0ns 30pF 1k open 2.3to2.7V VCC 2.0ns 30pF 500 open 2.7V 2.7V 2.5ns 50pF 500 open 3.0Vto 3.6V 2.7V 2.5ns 50pF 500 open 4.5 V to 5.5 V VCC 2.5ns 50pF 500 open |
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