| 数据搜索系统,热门电子元器件搜索 |
|
PAS6352 数据表(PDF) 5 Page - Pixart Imaging Inc. |
|
|
|||||||||||||||||||||||||||||
PAS6352 数据表(HTML) 5 Page - Pixart Imaging Inc. |
|
5 / 16 page ![]() PixArt Imaging Inc. PAS6352 CMOS Image Sensor IC All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. 5 PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw V0.6, 2012/11/13 Data Transfer Format Master transmits data to salve ( write cycle ) l S : Start. l A : Acknowledge by salve. l P : Stop. l RW : The LSB of 1 ST byte to decide whether current cycle is read or write cycle. RW = 1 – Read cycle, RW = 0 – Write cycle. l SUBADDRESS : The address values of PAS6352 internal control registers. ( Please refer to PAS6352 register description ) During write cycle, the master generates start condition and then places the 1 st byte data that are combined slave address ( 7 bits ) with a read / write control bit to SDA line. After slave ( PAS6352 ) issues acknowledgment, the master places 2 nd byte ( Sub Address ) data on SDA line. Again follow the PAS6352 acknowledgment, the master places the 8 bits data on SDA line and transmit to PAS6352 control register ( address was assigned by 2 nd byte ). After PAS6352 issues acknowledgment, the master can generate a stop condition to end of this write cycle. In the condition of multi-byte write, the PAS6352 sub-address is automatically increment after each DATA byte transferred. The data and A cycles is repeat until last byte write. Every control registers value inside PAS6352 can be programming via this way. Slave transmits data to master ( read cycle ) l The sub-address was taken from previous write cycle. l The sub-address is automatically increment after each byte read. l Am : Acknowledge by master. l Note there is no acknowledgment from master after last byte read. During read cycle, the master generates start condition and then place the 1 st byte data that are combined slave address ( 7 bits ) with a read / write control bit to SDA line. After issue acknowledgment, 8 bits DATA was also placed on SDA line by PAS6352. The 8 bits data was read from PAS6352 internal control register that address was assigned by previous write cycle. Follow the master acknowledgment, the PAS6352 place the next 8 bits data ( address is increment automatically ) on SDA line and then transmit to master serially. The DATA and Am cycles is repeat until the last byte read. After last byte read, Am is no longer generated by master but instead by keep SDA line high. The slave ( PAS6352 ) must releases SDA line to master to generate STOP condition. |
|
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |