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DSPIC33FJ64GP706 数据表(PDF) 143 Page - Microchip Technology |
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DSPIC33FJ64GP706 数据表(HTML) 143 Page - Microchip Technology |
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143 / 322 page  © 2009 Microchip Technology Inc. DS70286C-page 141 dsPIC33FJXXXGPX06/X08/X10 bit 1 LPOSCEN: Secondary (LP) Oscillator Enable bit 1 = Enable secondary oscillator 0 = Disable secondary oscillator bit 0 OSWEN: Oscillator Switch Enable bit 1 = Request oscillator switch to selection specified by NOSC<2:0> bits 0 = Oscillator switch is complete REGISTER 9-1: OSCCON: OSCILLATOR CONTROL REGISTER(1) (CONTINUED) Note 1: Writes to this register require an unlock sequence. Refer to Section 7. “Oscillator” (DS70186) in the “dsPIC33F Family Reference Manual” (available from the Microchip website) for details. 2: Direct clock switches between any primary oscillator mode with PLL and FRCPLL mode are not permitted. This applies to clock switches in either direction. In these instances, the application must switch to FRC mode as a transition clock source between the two PLL modes. |
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