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AS1121 数据表(PDF) 13 Page - ams AG

部件名 AS1121
功能描述  16-Channel LED Driver with Dot Correction and Greyscale PWM
PDF  22 Pages
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制造商  AMSCO [ams AG]
网页  http://www.ams.com
标志 AMSCO - ams AG

AS1121 数据表(HTML) 13 Page - ams AG

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www.austriamicrosystems.com/AS1121
Revision 1.01
12 - 21
AS1121
Datasheet - Detailed Descr i pti on
OUTn Enable
All OUTn channels can be collectively switched off with one signal. When OEN is set to 1, all OUTn channels are disabled, regardless of the
device logic operations. The greyscale counter is also reset when OEN is set to 1.
When OEN is set to 0, all OUTn channels are in normal operation.
Setting Maximum Channel Current
The maximum output current per channel is programmed by a single resistor, RIREF, which is placed between pin IREF and GND. The voltage
on pin IREF is set by an internal band gap VIREF (1.27V typ). The maximum channel current is equivalent to the current flowing through RIREF
multiplied by a factor of 31.5. The maximum output current is calculated as:
Where:
VIREF = 1.27V;
RIREF = User-selected external resistor.
Power Dissipation
To ensure proper operation of the device, the total power dissipation of the AS1121 must be below the power dissipation rating of the device
package. Total power dissipation is calculated as:
Where:
VCC is the device supply voltage;
ICC is the device supply current;
VOUT is the device OUTn voltage when driving LED current;
IMAX is the LED current adjusted by RIREF;
DCn is the maximum dot correction value for OUTn;
n is the number of OUTn driving LED at the same time;
dPWM is the duty cycle defined by pin OEN or the greyscale PWM value.
Operating Modes
The AS1121 operates in two modes (see Table 8). Greyscale operating mode (see Figure 22 on page 14) and the shift registers are in reset state
at power-up.
Table 7. Pin OEN Truth Table
OEN
OUT0:OUT15
0
Normal Operation
1Disabled
Table 8. Operating Modes
Mode
Input Shift Register
Operating Mode
0
192-bit
Greyscale PWM Mode
1
96-bit
Dot Correction Data Input Mode
IMAX =
VIREF
RIREF
x 31.5
(EQ 1)
PD = (VCC x ICC) + (VOUT x IMAX x n x
DCn
63
(EQ 2)
dPWM)



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