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AS1332

Datasheet - D e t a i l e d D e s c r i p t i o n

Figure 31. Typical Operating System Circuit

Operating the AS1332

AS1332’s control block turns on the internal PFET (P-channel MOSFET) switch during the first part of each switching

cycle, thus allowing current to flow from the input through the inductor to the output filter capacitor and load. The

During the second part of each cycle, the controller turns the PFET switch off, blocking current flow from the input, and

then turns the NFET (N-channel MOSFET) synchronous rectifier on. As a result, the inductor’s magnetic field

collapses, generating a voltage that forces current from ground through the synchronous rectifier to the output filter

capacitor and load.

While the stored energy is transferred back into the circuit and depleted, the inductor current ramps down with a slope

smoothing the voltage across the load. The output voltage is regulated by modulating the PFET switch on time to

control the average current sent to the load. The effect is identical to sending a duty-cycle modulated rectangular wave

formed by the switch and synchronous rectifier at SW to a low-pass filter formed by the inductor and output filter

capacitor.

The output voltage is equal to the average voltage at the SW pin.

While in operation, the output voltage is regulated by switching at a constant frequency and then modulating the

energy per cycle to control power to the load. Energy per cycle is set by modulating the PFET switch on-time pulse

width to control the peak inductor current. This is done by comparing the signal from the current-sense amplifier with a

slope compensated error signal from the voltage-feedback error amplifier. At the beginning of each cycle, the clock

turns on the PFET switch, causing the inductor current to ramp up. When the current sense signal ramps past the error

amplifier signal, the PWM comparator turns off the PFET switch and turns on the NFET synchronous rectifier, ending

the first part of the cycle.

If an increase in load pulls the output down, the error amplifier output increases, which allows the inductor current to

ramp higher before the comparator turns off the PFET. This increases the average current sent to the output and

adjusts for the increase in the load. Before appearing at the PWM comparator, a slope compensation ramp from the

oscillator is subtracted from the error signal for stability of the current feedback loop. The minimum on time of PFET in

PWM mode is 50ns (typ.)

AS1332

AGND

PGND

PVIN

VDD

SW

FB

1.3V to 3.16V

4.7 µF

3.3 µH

2.7V to 5.5V

10 µF

DAC

ON/OFF

System

Controller

C1

C2

L1