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AS1360 数据表(PDF) 3 Page - ams AG |
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AS1360 数据表(HTML) 3 Page - ams AG |
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3 / 14 page ![]() www.austriamicrosystems.com/LDOs/AS1360 Revision 1.07 2 - 13 AS1360 Datasheet - P i n o u t a n d P a c k a g i n g 4 Pinout and Packaging Pin Assignments Figure 2. Pin Assignments (Top View) Pin Descriptions Table 1. Pin Descriptions Pin Number Pin Name Description 1 GND Ground. This pin should be connected to the negative side of the output and the negative terminal of the input capacitor. No high-current flows out of this pin, only bias current (1.5 A, typ). Note: Voltage drops between this pin and the negative side of the load should be mini- mized. 2 VOUT Regulated Output Voltage. This pin should be connected to the positive side of the load and the positive terminal of the output capacitor. Current flowing out of this pin is equivalent DC load current. Note: The positive side of the output capacitor should be mounted as close as is practical to this pin. 3 VIN Unregulated Input Voltage. This pin should be connected to the positive terminal of the input capacitor. Note: The input capacitor should be mounted as close as is practical to this pin. 3 1 3-pin SOT23 VIN GND VOUT 2 AS1360 |
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