AS5040

Data Sheet

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Revision 2.10

20 - 33

Repeated OTP Programming

Although a single AS5040 OTP register bit can be programmed only once (from 0 to 1), it is possible to program other,

unprogrammed bits in subsequent programming cycles. However, a bit that has already been programmed should not

be programmed twice. Therefore it is recommended that bits that are already programmed are set to “0” during a

programming cycle.

Non-permanent Programming

It is also possible to re-configure the AS5040 in a non-permanent way by overwriting the OTP register.

This procedure is essentially a “Write Data” sequence (see Figure 14) without a subsequent OTP programming cycle.

The “Write Data” sequence may be applied at any time during normal operation. This configuration remains set while

the power supply voltage is above the power-on reset level (see 0).

See Application Note AN5000-20 for further information.

Analog Readback Mode

Non-volatile programming (OTP) uses on-chip zener diodes, which become permanently low resistive when subjected

to a specified reverse current.

The quality of the programming process depends on the amount of current that is applied during the programming

process (up to 130mA). This current must be provided by an external voltage source. If this voltage source cannot

provide adequate power, the zener diodes may not be programmed properly.

In order to verify the quality of the programmed bits, an analog level can be read for each zener diode, giving an

indication whether this particular bit was properly programmed or not.

To put the AS5040 in analog readback mode, a digital sequence must be applied to pins CSn, Prog and CLK as

shown in Figure 17. The digital level for this pin depends on the supply configuration (3.3V or 5V; see section 14).

The second rising edge on CSn (OutpEN) changes pin Prog to a digital output and the log. high signal at pin Prog

must be removed to avoid collision of outputs (grey area in Figure 17).

be saved as a reference for the calculation of the subsequent programmed and unprogrammed OTP bits.

Following this step, each rising slope of CLK outputs one bit of data in the reverse order as during programming.

(see Figure 17: Md0-MD1-Div0,Div1-Indx-Z0…Z9, ccw)

During analog readback, the capacitor at pin Prog (see Figure 16) should be removed to allow a fast readout rate. . If

the capacitor is not removed the analog voltage will take longer to stabilize due to the additional capacitance.

value gives an indication on the quality of the programmed bit: a reading of <100mV indicates a properly programmed

bit and a reading of >1V indicates a properly unprogrammed bit.

A reading between 100mV and 1V indicates a faulty bit, which may result in an undefined digital value, when the OTP

is read at power-up.

Following the 16

Figure 17: OTP Register Analog Read

In terna l

te st bit

digita l

CS n

CL K

1

16

P rog

Pro gEN

Md 1

Md0

A nalog R ead ba c k D ata a t P rog

O u tpEN

P ro g ch an ges to O utp ut

P ow e r-o n-

Re se t;

tu rn o ff

supply

Div1

Div0

Z6

Z5

Z8

Z7

ccw

Z9